Nonlinear Diode Load for Multi-Level Resistance Memory Read Accuracy

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Solution Overview

Problem

Existing memory devices using resistance change memory elements, such as phase change memory (PCM) or interfacial phase change memory (iPCM), face challenges in realizing multi-level memory due to narrow margins between resistance distributions and potential differences, making accurate read operations difficult.

Innovation Solution

Incorporating a load circuit with a nonlinear current-voltage characteristic, such as a diode, connected in series with the resistance change memory element, and a comparator circuit that compares voltages with reference voltages, allowing for accurate multi-level memory operations by distributing operating points evenly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a resistance change memory element is used for multi-level memory, then storage capacity is improved, but read accuracy deteriorates due to narrow margins between resistance distributions

Engineering Contradiction:
Improvestorage capacityVSAvoidread accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

A diode is introduced as an intermediary component connected in series with the resistance change memory element. The diode's nonlinear current-voltage characteristic acts as a mediator that transforms the resistance states into more distinguishable voltage levels at the bit line, thereby improving read accuracy while maintaining multi-level storage capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent utilizes the nonlinear current-voltage parameter characteristic of the diode to transform the resistance states. By operating the diode in its nonlinear region, small differences in resistance are amplified into larger voltage differences at the bit line, enhancing the distinguishability of adjacent resistance levels

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If conventional linear load circuit is used, then circuit simplicity is maintained, but operating points are not evenly distributed reducing read accuracy

Engineering Contradiction:
Improvecircuit simplicityVSAvoidread accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The load circuit is changed from linear to nonlinear by introducing a diode. This parameter change in the load circuit's current-voltage characteristic enables even distribution of operating points across different resistance states, improving voltage level separation and read accuracy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The nonlinear current-voltage characteristic of the diode introduces curvature in the I-V relationship, which transforms the linear voltage distribution into a more uniform distribution of operating points across the resistance states, enhancing distinguishability

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables stable and accurate multi-level memory operations by ensuring equal intervals between bit line voltages and reference voltages, improving read accuracy and circuit stability.

Implementation Method 1

a load circuit connected to the memory cell in series and acting as a load for the resistance change memory element; a comparator circuit which compares a voltage obtained by the load circuit with a plurality of reference voltages

Methodology Applied
Scientific EffectNonlinear current-voltage characteristic: Diode

Data Source

PatentUS11615840B2Memory device
Publication Date: 2023.03.28 KIOXIA CORP
  • US11615840B2 patent drawing
  • US11615840B2 patent drawing
  • US11615840B2 patent drawing

AI summary

According to one embodiment, a memory device includes a memory cell including a resistance change memory element in which a plurality of data values according to resistance are allowed to be set, and a selector element connected to the resistance change memory element in series, a word line supplying a select signal for selecting the resistance change memory element by the selector element to the memory cell, a bit line to which a data signal according to a data value set in the resistance change memory element is read, a load circuit connected to the memory cell in series and functioning as a load, and a comparator circuit which compares a voltage obtained by the load circuit with a plurality of reference voltages.