Diode Layout With P-Type Well Segmentation for Leakage Suppression
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing leakage current due to parasitic pnp transistors, which affect the efficiency and reliability of diode operations.
Innovation Solution
The semiconductor device incorporates a diode structure with a p-type epitaxial layer, an n-type diffusion region, and an n-type buried layer with a higher impurity concentration, along with a p-type layer that divides the diffusion region and extends to the buried layer, thereby reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional diode structure with n-type buried layer is used, then the basic rectification function is achieved, but leakage current occurs due to parasitic pnp transistors
Solution Approach 1:
The diffusion region is divided into multiple regions by introducing a p-type layer that extends from the main surface to the buried layer. This segmentation creates separate current paths, isolating the cathode contact region from external interference and preventing leakage current from flowing through parasitic transistor paths.
Solution Approach 2:
A p-type layer is selectively introduced at specific locations (extending from the main surface to the buried layer in the cathode contact region) to create local electrical property changes. This local modification forms a parasitic npn transistor structure that actively suppresses leakage current without affecting the overall diode structure.
2Reliability
If the diode structure is simplified, then manufacturing is easier, but leakage current control becomes insufficient
Solution Approach 1:
The p-type layer is merged with the existing diode structure, extending from the main surface through the epitaxial layer to the buried layer. This integration creates a multi-functional structure that maintains rectification while adding leakage suppression capability, avoiding the need for completely separate suppression mechanisms.
Data Source
AI summary
The present disclosure provides a semiconductor device including a diode. The semiconductor device includes: a semiconductor substrate; an n-type diffusion region selectively formed in a surface layer portion of a p-type epitaxial layer; an n-type buried layer sandwiched between the semiconductor substrate and the n-type diffusion region and having an impurity concentration greater than that of the n-type diffusion region; a p-type anode contact region formed in a surface layer portion of a first main surface of the semiconductor substrate; an n-type first cathode contact region formed in a surface layer portion of the n-type diffusion region and in a surface layer portion of the first main surface; a p-type well region extending along a depth direction from the first main surface outside the first cathode contact region to reach the n-type buried layer, dividing the n-type diffusion region along a direction along the first main surface.