Diodic Transfer Gate for CMOS Image Sensor Charge Spillback
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Solution Overview
Problem
Current CMOS image sensors face challenges with image lag and dark current leakage due to incomplete charge transfer from the photodiode to the floating diffusion, particularly when the transfer gate is turned off, leading to 'spillback' of charges.
Innovation Solution
A novel CMOS active pixel sensor (APS) cell structure with a transfer gate device featuring a diodic or split gate structure, allowing separate biasing of n and p-type regions to prevent charge spillback, using a gate dielectric layer and a gate conductor with distinct doped regions for efficient charge transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional transfer gate is used to transfer charge from photodiode to floating diffusion, then charge transfer is achieved, but image lag and dark current leakage occur due to incomplete transfer and charge spillback
Solution Approach 1:
The transfer gate is divided into two separate gates: a first transfer gate (n-type polysilicon) and a second transfer gate (p-type polysilicon). This segmentation allows independent control of charge transfer and spillback prevention, enabling complete charge transfer without residual charges that cause image lag and dark current leakage
Solution Approach 2:
Different regions of the transfer mechanism are given different properties: the first transfer gate region uses n-type doping optimized for electron transfer, while the second transfer gate region uses p-type doping optimized for preventing charge spillback. This local differentiation of material properties enables simultaneous achievement of complete transfer and spillback prevention
2Use of energy by moving object
If the transfer gate is turned off after charge transfer, then power consumption is reduced, but charge spillback occurs leading to image lag
Solution Approach 1:
The first transfer gate performs the charge transfer action in advance, completely emptying the photodiode before the second transfer gate is activated. This preliminary action ensures that when power is reduced or the gates are turned off, no residual charges remain to cause spillback and image lag, maintaining image quality while enabling power savings
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces image lag and dark current leakage by enabling two-phase voltage biasing to clock charges out of the photodiode without 'spillback', improving the overall performance of CMOS image sensors.
Implementation Method 1
the gate conductor layer comprising a first doped region of first conductivity type material including an associated first transfer gate electrode and a second doped region of a second conductivity type material including an associated second transfer gate electrode
Data Source
AI summary
A method of forming a CMOS active pixel sensor (APS) cell structure having at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure. Alternately, an intermediate charge storage device and second transfer gate device may be provided which may first temporarily receive charge carriers from the photosensing device, and, upon activating the second transfer gate device in a further timed fashion, read out the charge stored at the intermediate charge storage device for transfer to the second transfer gate device while preventing spillback of charges to the photosensing device. The APS cell structure is further adapted for a global shutter mode of operation, and further comprises a light shield element is further provided to ensure no light reaches the photosensing and charge storage devices during charge transfer operation.