Multilayer Diplexer Via Layout for High-Pass Return Loss
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Solution Overview
Problem
Existing diplexers face challenges in suppressing return loss in the high-pass circuit, especially when the bandwidth between the low and high frequency bands is narrow, leading to inadequate signal matching and susceptibility to improvements.
Innovation Solution
The diplexer design includes a plurality of dielectric layers with a common terminal and separate lines connecting the high-pass and low-pass circuits, featuring a via that extends along the lamination direction to connect the common line to the capacitor in the high-pass circuit, adding an inductance component and improving matching, thereby reducing return loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the capacitor in the high-pass circuit is directly connected to the via extending from the common terminal at the same layer, then the device complexity is reduced, but the return loss in the high-pass circuit cannot be appropriately suppressed when the bandwidth between low band and high band is narrow
Solution Approach 1:
The invention transitions the capacitor connection from a planar same-layer configuration to a three-dimensional multi-layer configuration. The capacitor is disposed on a layer different from the common line layer and connected via a via, adding vertical dimensionality to the connection path. This dimensional change enables improved return loss suppression by creating a longer, more controlled impedance path while maintaining manufacturing feasibility through standard multi-layer PCB techniques.
2Reliability
If a via is added to connect the common line to the capacitor on a different layer, then the return loss in the high-pass circuit is reduced, but the device complexity increases
Solution Approach 1:
The invention modifies the physical parameters of the connection structure by changing the layer configuration and via placement. Specifically, it adjusts the vertical position of the capacitor on a different layer and uses a via to create a controlled impedance path. This parameter change optimizes the electrical characteristics (return loss) while the via and layer transitions represent manageable increases in structural complexity that are standard in multi-layer circuit board design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces return loss in the high-pass circuit, enhancing signal matching and performance, especially in narrow bandwidth scenarios, while maintaining minimal impact on the low-pass circuit characteristics.
Implementation Method 1
By first via B1, an inductance component is added between the upper-side end portion of the common line 101 and the capacitor C3 in the high-pass circuit 1H
Data Source
AI summary
A diplexer includes dielectric layers stacked in a lamination direction. The diplexer includes a reference surface extending in a direction orthogonal or substantially orthogonal to the lamination direction, a common terminal on the reference surface, a high-pass circuit including a capacitor, a low-pass circuit including an inductor, a common line connecting the common terminal and a branch portion, a first via connecting the branch portion and the capacitor in the high-pass circuit, and a second via connecting the branch portion and the inductor in the low-pass circuit. The first via extends along the lamination direction from a first layer where the branch portion is located to a second layer where the capacitor in the high-pass circuit is located.