Gate Stack Dipole Compensation for Multi-Threshold FETs

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Solution Overview

Problem

Existing transistor technologies face challenges in efficiently tuning and defining different threshold voltages for various transistors on a common substrate, particularly when using thin gate channels, as traditional methods like well implants struggle to achieve precise voltage tuning and are limited by the small space available for voltage definition.

Innovation Solution

The use of chemical dipole materials between the interlayer dielectric and high-k dielectric in semiconductor structures to shift threshold voltages towards the conduction or valence band, allowing for the definition of multiple threshold voltages by compensating voltage shifts, thereby enabling transistors with distinct threshold voltages to be fabricated on a common substrate with fewer steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional well implant methods are used to tune threshold voltage, then threshold voltage can be adjusted, but the precision is insufficient and the space required is limited

Engineering Contradiction:
Improvethreshold voltage precisionVSAvoidspace available for voltage definition
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent changes the physical and chemical parameters of the gate stack by introducing dipole materials with specific dipole moments. By selecting dipole materials with different dipole moments and configuring them in different patterns (present or absent in different transistors), the threshold voltage of each transistor can be precisely tuned. This approach replaces the spatially extensive well implant method with a chemically-based parameter adjustment that requires minimal space.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The gate stack is constructed as a composite structure comprising multiple layers including interfacial dielectric, high-k dielectric, and dipole material layers. The dipole materials are integrated into this composite structure, allowing for precise threshold voltage control through the chemical properties of the dipole materials rather than through spatially extensive physical modifications.

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If multiple work function metal deposition steps are used to define different threshold voltages, then different threshold voltages can be achieved, but the fabrication process becomes more complex

Engineering Contradiction:
Improvenumber of threshold voltagesVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The dipole material layer serves multiple functions: it defines threshold voltage, compensates for voltage shifts in adjacent transistors, and enables multiple threshold voltage values. By using the same dipole material layer for multiple purposes and for defining multiple different threshold voltages across different transistor groups, the fabrication process complexity is reduced while maintaining the ability to define multiple threshold voltages.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the threshold voltage definition function with the voltage shift compensation function into a single dipole material layer. Instead of using separate work function metal layers for each transistor type, the dipole material layer simultaneously performs both functions by strategically placing or omitting the material in different transistor regions, thereby reducing the total number of fabrication steps.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If dipole materials are used to shift threshold voltages, then precise threshold voltage definition is achieved, but additional fabrication steps are required

Engineering Contradiction:
Improvethreshold voltage definitionVSAvoidfabrication process efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The dipole material layer is deposited and configured during the gate stack formation process, before the transistors are fully fabricated. By establishing the threshold voltage characteristics early in the process through the dipole material configuration, subsequent fabrication steps can proceed without additional threshold voltage adjustment operations, thereby maintaining high manufacturing precision without significantly impacting overall productivity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the efficient fabrication of transistors with varied threshold voltages, improving power consumption and performance by enabling precise tuning of threshold voltages, which is not achievable with traditional methods, and reduces the complexity of the fabrication process.

Implementation Method 1

chemical dipole materials between the interlayer dielectric and high-k dielectric in semiconductor structures to shift threshold voltages towards the conduction or valence band

Methodology Applied
Scientific EffectDipole effect: Electric Field

Data Source

PatentUS11735593B2Gate stack dipole compensation for threshold voltage definition in transistors
Publication Date: 2023.08.22 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11735593B2 patent drawing
  • US11735593B2 patent drawing
  • US11735593B2 patent drawing

AI summary

A semiconductor structure includes a semiconductor substrate, with first, second, and third field effect transistors (FETs) formed on the substrate. A gate of the first FET includes a gate electrode, a first work function metal (WFM) layered with a first interfacial layer (IL) and a first high-k dielectric (HK); a gate of the second FET includes the first WFM layered with a second IL, a second HK, and a first dipole material; and a gate of the third FET includes the first WFM layered with a third IL, a third HK, the first dipole material, and a second dipole material. The first FET does not include the first dipole material and does not include the second dipole material, and the second FET does not include the second dipole material.