Dirac Material Source Field Effect Transistor Sub-60 mV/Dec Swing
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Solution Overview
Problem
Conventional MOSFETs are limited by a subthreshold swing of 60 mV/Dec due to thermal excitation, restricting the operating voltage of integrated circuits and power consumption, while existing transistors that achieve sub-60 mV/Dec swings, such as tunnel FETs and negative-capacitance transistors, suffer from low drive current or instability.
Innovation Solution
A field effect transistor is designed with a source made of Dirac material, a channel doped opposite to the source, and a gate insulated from the channel, featuring a contact barrier height less than 0.2 eV and a gate insulating layer with an equivalent oxide thickness of less than 2 nm, allowing for a subthreshold swing of less than 60 mV/Dec without compromising drive current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a heavily doped n-p tunneling junction is formed in the channel to achieve sub-60 mV/Dec subthreshold swing, then the turn-off speed is improved, but the drive current is greatly reduced
Solution Approach 1:
The patent changes the material parameter of the source from conventional semiconductor to Dirac material, which fundamentally alters the carrier transport mechanism. This parameter change enables the source to emit carriers via thermal excitation without requiring a heavily doped tunneling junction, thus achieving sub-60 mV/Dec subthreshold swing while maintaining high drive current.
Solution Approach 2:
The patent uses a composite structure combining Dirac material source with conventional semiconductor channel. The Dirac material source layer is formed on the substrate, followed by the semiconductor channel layer, creating a heterostructure that leverages the unique properties of Dirac material (high carrier emission) while maintaining the functional properties of semiconductor channel.
2Use of energy by moving object
If the operating voltage is reduced below 0.64 V to achieve ultra-low power consumption, then the power consumption is improved, but the thermal excitation limit of 60 mV/Dec prevents further voltage reduction
Solution Approach 1:
The patent changes the subthreshold swing parameter from the conventional 60 mV/Dec limit to less than 60 mV/Dec by using Dirac material source. This parameter change breaks the thermal excitation limit, enabling the transistor to achieve steeper subthreshold characteristics and thus allow operating voltages below 0.64 V while maintaining ultra-low power consumption.
3Power
If negative-capacitance transistors with ferroelectric materials are used to achieve sub-60 mV/Dec subthreshold swing and high drive current, then both subthreshold swing and drive current are improved, but the device exhibits slow speed, poor stability, and unsuitability for integration
Solution Approach 1:
The patent replaces the complex ferroelectric negative-capacitance gate structure with a simpler Dirac material source configuration. The Dirac material source inherently provides high carrier emission capability without requiring ferroelectric materials, eliminating the associated stability and integration issues while maintaining high drive current and sub-60 mV/Dec performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The transistor achieves a subthreshold swing of less than 60 mV/Dec at room temperature, enabling lower operating voltage and reduced power consumption while maintaining comparable on-state and off-state currents, thus overcoming the limitations of conventional FETs.
Implementation Method 1
carriers can be thermally excited from the Dirac material source to the channel
Implementation Method 2
the channel is disposed between the source and the drain, and doped opposite to the source
Data Source
AI summary
A field effect transistor (FET), a method of fabricating the field effect transistor, and an electronic device are provided. The field effect transistor comprises: a source and a drain, the source being made of a Dirac material (103); a channel disposed between the source and the drain, and doped opposite to the source; and a gate (106) disposed on the channel and electrically insulated from the channel.