Direct Access Flash Translation Layer for Virtualized Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional file systems, designed for block storage, face inefficiencies when accessing page addressable storage devices like SSDs, leading to excessive read and write operations that reduce the lifespan and performance of flash memory due to write amplification and multiple translation layers, which hinder resource sharing across virtual computing instances.
Innovation Solution
Implementing a direct access flash translation layer within the hypervisor to map virtual addresses directly to physical page addresses, reducing the number of mappings required and allowing page addressable memory to be accessed using page operations instead of block operations, thereby improving access speed and resource sharing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional file systems with multiple translation layers are used to access page addressable storage, then compatibility with block storage devices is maintained, but access speed decreases and write amplification increases
Solution Approach 1:
The patent extracts and eliminates the intermediate translation layers (host file system translation from VA to LBA, and FTL translation from LBA to PPA) by implementing a direct translation mechanism within the VCI that translates virtual addresses directly to physical page addresses, thereby maintaining compatibility while improving access speed
Solution Approach 2:
The patent creates an asymmetric translation architecture where the VCI implements unidirectional direct translation from virtual addresses to physical page addresses, breaking the traditional symmetric multi-layer translation approach and achieving faster access
2Adaptability or versatility
If multiple translation layers are implemented to facilitate access to page addressable memory, then resource sharing across virtual computing instances is enabled, but the number of read and write operations increases
Solution Approach 1:
The patent removes the redundant translation operations by implementing direct VA to PPA translation within the VCI, extracting the harmful intermediate translation steps that caused write amplification while preserving the resource sharing capability through proper virtualization management
3Ease of operation
If traditional FTL mapping from LBA to PPA is used, then block-based virtual disk access is supported, but flash memory lifespan decreases due to write amplification
Solution Approach 1:
The patent changes the addressing parameter from block-based LBA to page-based PPA directly, altering the translation mechanism to match the physical page structure of flash memory, thereby eliminating write amplification while maintaining ease of operation through transparent address translation
Data Source
AI summary
The disclosure provides an approach for accessing data stored in a page addressable memory by a first virtual computing instance (VCI) running on a host, the host running a virtualization layer configured to provide access to resources to the first VCI. The approach includes mapping by a flash translation layer (FTL) of the virtualization layer a first virtual address received in an I/O request from the first VCI directly to a physical page address (PPA) of the page addressable memory. The approach includes issuing an access request to the page addressable memory based on the I/O request, the access request comprising the PPA. The approach includes receiving data stored at the PPA from the page addressable memory. The approach includes passing the data to the first VCI.