Direct Chip Attach Assembly Without a Package Substrate
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Solution Overview
Problem
The challenge in semiconductor technology is the difficulty in efficiently communicating large numbers of signals between a circuit board and multiple dies in a multi-die IC package due to the small size of the dies, thermal constraints, and power delivery constraints, which are exacerbated by the need for thick package substrates.
Innovation Solution
The implementation of microelectronic assemblies that enable direct chip attach of dies to circuit boards without a package substrate, using a metallization stack on the back side of the die and a redistribution layer or backend transistors to address the differences in size and pitch between signal lines and conductive contacts, allowing for efficient signal routing and power delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a package substrate is used to connect dies to circuit boards, then mechanical support and electrical connection are provided, but the overall height of the assembly increases and thermal constraints are exacerbated
Solution Approach 1:
The patent removes the package substrate from the assembly, directly attaching the dies to the circuit board. This extraction of the intermediate substrate eliminates the additional height it contributes while maintaining electrical connections through direct bonding interfaces between the dies and circuit board trace layers.
Solution Approach 2:
The patent merges the functions of the package substrate with the circuit board itself by directly mounting dies to the circuit board. The circuit board simultaneously provides mechanical support, electrical connections, and thermal management pathways, eliminating the need for a separate package substrate layer.
2Reliability
If signal lines are routed through a thick package substrate, then electrical connection is established, but thermal constraints and power delivery constraints are exacerbated
Solution Approach 1:
The patent extracts the package substrate that was causing thermal constraints. By eliminating this intermediate layer, heat generated by the dies can be more efficiently transferred directly to the circuit board, which has better thermal management capabilities, thereby reducing thermal constraints.
Solution Approach 2:
The patent changes the routing dimension by establishing direct vertical connections from the dies to the circuit board trace layers through bonding interfaces, eliminating the need for signals to traverse through the thickness of a package substrate. This dimensional shortcut reduces both thermal resistance and power delivery constraints.
3Quantity of substance
If the size of dies is reduced to increase functional unit density, then capacity is increased, but communication efficiency between dies and circuit board deteriorates
Solution Approach 1:
The patent transitions from planar signal routing through a substrate to direct vertical bonding connections. This dimensional change allows even tiny dies with minimal pitch to achieve efficient communication with the circuit board, as the connection path is established through direct physical contact rather than through lengthy substrate traces.
Solution Approach 2:
The patent introduces bonding interfaces as direct mediators between the die contact pads and circuit board trace layers. These bonding interfaces enable efficient electrical and thermal coupling without requiring signals to propagate through a package substrate, thereby maintaining communication efficiency even as die size decreases.
4Adaptability or versatility
If a metallization stack with redistribution layer is implemented on the back side of the die, then signal routing flexibility is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements the metallization stack and redistribution layer on the back side of the die during the standard semiconductor fabrication process, before the die is attached to the circuit board. This preliminary action integrates the signal routing flexibility into the die itself, allowing the die to be directly mounted without requiring additional substrate-based routing infrastructure.
Data Source
AI summary
Various aspects of the present disclosure set forth IC dies, microelectronic assemblies, as well as related devices and packages, related to direct chip attach of dies and circuit boards. An example microelectronic assembly includes a die with IC components provided over the die's frontside, and a metallization stack provided over the die's backside. The die further includes die interconnects extending between the frontside and the backside of the die, to electrically couple the IC components and the metallization stack. The assembly further includes backside conductive contacts, provided over the side of the metallization stack facing away from the die, the backside conductive contacts configured to route signals to/from the IC components via the metallization stack and the die interconnects, and configured to be coupled to respective conductive contacts of a circuit board in absence of a package substrate between the die and the circuit board.