Direct Contact Interconnect Structure for Capture-Pad-Free Routing
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Solution Overview
Problem
Conventional interconnect structures in semiconductor assemblies rely on capture pads, which limit the construction of compact or high-density structures due to routing density constraints and size/shape limitations of connections between conductive layers.
Innovation Solution
The implementation of a molded direct contact interconnect build-up structure without capture pads, utilizing conductive studs and encapsulant layers with specific surface roughness and patterning to enable efficient electrical coupling and high-density connections, allowing for the removal of polyimide and other polymers and facilitating continuous metal structures across layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional interconnect structures with capture pads are used, then connectivity between layers is achieved, but routing density is limited and structure compactness is reduced
Solution Approach 1:
The patent removes capture pads from the interconnect structure, extracting the unnecessary component that was limiting routing density. The direct contact between conductive studs and conductive layers eliminates the need for capture pads, enabling higher routing density while maintaining connectivity precision through the direct stud-to-layer contact mechanism.
Solution Approach 2:
The patent transitions from a planar interconnect approach with capture pads to a vertical direct-contact approach using conductive studs that extend through encapsulant layers. This dimensional change allows connections to be made directly between layers without requiring lateral capture pad areas, thereby increasing routing density while maintaining precise connectivity.
2Reliability
If capture pads are used to correct manufacturing inconsistencies, then connectivity reliability is improved, but the size and shape of connections between conductive layers are limited
Solution Approach 1:
The patent changes the geometric parameters of the interconnect structure by replacing capture pads with conductive studs of varying heights and configurations. The studs can be shaped and sized to match the underlying conductive layer features directly, providing manufacturing tolerance compensation through geometric flexibility rather than through capture pad area, thus enabling diverse connection shapes and sizes.
3Ease of manufacture
If conventional interconnect structures are used, then manufacturing process is established, but polyimide and polymers are required increasing cost and complexity
Solution Approach 1:
The patent removes polyimide and polymer layers from the interconnect structure, extracting the unnecessary material components that increase cost and complexity. The encapsulant material serves multiple functions including insulation and mechanical support without requiring separate polyimide layers, simplifying the overall device structure while maintaining manufacturability through established molding processes.
4Area of stationary object
If direct contact interconnect structure without capture pads is implemented, then routing density is increased and structure compactness is improved, but manufacturing precision requirements are increased
Solution Approach 1:
The patent performs preliminary alignment actions during the molding process by forming the encapsulant and conductive studs in their final positions before subsequent conductive layer deposition. The mold cavity defines the precise positions of conductive studs relative to the semiconductor component, establishing alignment beforehand and reducing the precision requirements for subsequent manufacturing steps while enabling high routing density.
Data Source
AI summary
An electronic assembly may include a component comprising conductive studs disposed over an active layer of the component. A first encapsulant layer may be disposed around four side surfaces of the component, over the active layer of the component, and contacting at least a portion of the sides of the conductive studs. A substantially planar surface may be disposed over the active layer of the component, wherein the substantially planar surface comprises ends of the conductive studs and the first encapsulant layer. The first encapsulant layer comprises a roughness less than 500 nanometers. First conductive elements may be disposed over the encapsulant and coupled with the conductive studs. A second layer of encapsulant may be disposed over the first conductive elements.