Direct-Conversion Transmitter PLL Architecture for Low Phase Noise
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Solution Overview
Problem
Direct-conversion transmitters face challenges in reconciling narrow loop bandwidth for sideband phase noise suppression with resistance to frequency pulling, and two-step architectures require expensive high-Q filters and additional circuitry, increasing cost and size.
Innovation Solution
A transmitter circuit using a first phase-locked loop and frequency dividers to generate a non-harmonically related frequency signal, allowing a second PLL to provide wide loop bandwidth for pulling resistance while maintaining low phase noise, and flexible frequency selection through divisor values, eliminating the need for additional LO circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the loop bandwidth of the frequency synthesizer is kept narrow to suppress sideband phase noise, then Adjacent Channel Power suppression performance is improved, but the VCO becomes prone to frequency pulling from high-power transmit signal modulations
Solution Approach 1:
The patent divides the frequency synthesis function into two separate loops: a first PLL that generates a non-harmonically related frequency signal with narrow bandwidth for low phase noise, and a second PLL that generates the transmit frequency signal with wide bandwidth for pulling resistance. This segmentation allows each loop to be optimized for its specific function without compromise.
Solution Approach 2:
The first frequency signal serves as an intermediary that is non-harmonically related to the transmit frequency. By using this intermediate frequency that is not harmonically related to the transmit frequency, the VCO in the second PLL is protected from pulling effects while still enabling precise frequency generation through the frequency dividers and phase-locking mechanism.
2Reliability
If the loop bandwidth of the frequency synthesizer is increased to improve resistance to VCO pulling, then frequency stability is improved, but sideband phase noise suppression capability deteriorates
Solution Approach 1:
The patent divides the frequency synthesis function into two separate loops: a first PLL that generates a non-harmonically related frequency signal with narrow bandwidth for low phase noise, and a second PLL that generates the transmit frequency signal with wide bandwidth for pulling resistance. This segmentation allows each loop to be optimized for its specific function without compromise.
3Reliability
If a two-step frequency conversion architecture is used to mitigate VCO pulling, then pulling resistance is improved, but unwanted sidebands and spurious frequencies are generated that require expensive high-Q filters
Solution Approach 1:
The patent segments the frequency synthesis into two independent PLL loops, where the first PLL generates a frequency signal that is deliberately made non-harmonically related to the transmit frequency. This segmentation prevents the generation of unwanted harmonic sidebands and spurious frequencies that would otherwise require high-Q filters for suppression.
Solution Approach 2:
The patent changes the fundamental parameter of frequency relationship by ensuring the first frequency signal is non-harmonically related to the transmit frequency signal. This parameter change eliminates the generation of predictable harmonic sidebands and spurious frequencies, removing the need for expensive high-Q filters while maintaining pulling resistance through the wide bandwidth of the second PLL.
4Reliability
If a translational loop architecture with additional LO circuitry is used to mitigate VCO pulling, then pulling resistance is improved, but circuit cost and size increase due to additional VCOs and PLL components
Solution Approach 1:
The first frequency signal generated by the first PLL serves multiple functions: it provides the frequency reference for the second PLL, serves as the LO signal for frequency conversion, and enables flexible frequency selection through programmable frequency dividers. This multi-functionality eliminates the need for separate additional LO circuitry while maintaining the pulling resistance benefits.
Solution Approach 2:
The patent changes the operational mode by making the first frequency signal non-harmonically related to the transmit frequency, which fundamentally alters how the PLLs interact. This parameter change allows the system to achieve pulling resistance through bandwidth control in the second PLL without requiring additional VCOs or complex translational loop architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves low phase noise and effective Adjacent Channel Power suppression with reduced circuit complexity and cost, enabling efficient and economical wireless communication transmitter designs.
Implementation Method 1
a second PLL configured to generate the transmit frequency signal by phase-locking the intermediate frequency feedback signal to the intermediate frequency reference signal
Implementation Method 2
a first frequency divider configured to divide the first frequency signal to generate a mixing frequency signal for down converting the transmit frequency signal into an intermediate frequency feedback signal, a second frequency divider configured to generate an intermediate frequency reference signal by dividing the first frequency signal
Data Source
AI summary
A method and apparatus for direct-conversion transmission generates a first frequency signal that is non-harmonically related to a transmit frequency signal, divides the first frequency signal to obtain a mixing frequency signal, divides the first frequency signal to obtain an intermediate frequency reference signal, generates the transmit frequency signal by using the mixing frequency signal to downconvert the transmit frequency signal into an intermediate frequency feedback signal, and phase-locks the intermediate frequency feedback signal to the intermediate frequency reference signal. The transmit frequency signal may be phase modulated, and may serve as an input to a saturated-mode power amplifier that can be configured for corresponding amplitude modulation. Alternatively, the un-modulated transmit frequency signal serves as the carrier signal input to a quadrature modulator, which imparts I/Q modulations to it, thereby producing a modulated carrier signal for input to a linear power amplifier.