Direct Data Placement via Sequence Mapping

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Solution Overview

Problem

The Transmission Control Protocol (TCP) imposes a significant burden on central processing units (CPUs) due to its optimization for accurate delivery rather than speed, leading to long delays in handling out-of-order packets and retransmissions, which creates bottlenecks in data delivery.

Innovation Solution

Mapping transport sequence numbers in data packets to respective buffers in a host computer's memory, allowing hardware logic in a network interface controller (NIC) to write data directly to memory, offloading CPU tasks and enabling efficient data handling while leaving header and protocol processing to the CPU.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If TCP is optimized for accurate delivery with sequence number tracking and retransmission handling, then delivery reliability is improved, but processing speed deteriorates due to CPU burden

Engineering Contradiction:
Improvedelivery accuracyVSAvoiddata delivery speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent extracts the TCP sequence number mapping function from the CPU to a dedicated hardware component (translation lookaside buffer or similar structure). This separates the reliable delivery tracking function from the general-purpose processor, allowing CPU to focus on application logic while hardware handles packet sequencing, thus improving both reliability maintenance and processing speed

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a translation lookaside buffer as an intermediary structure between the network interface and application memory. This buffer acts as a mediator that translates packet sequence numbers to application buffer addresses, enabling efficient data placement without CPU intervention for each packet, thereby resolving the contradiction between reliable delivery tracking and processing speed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If CPU handles all TCP packet processing including data placement, then protocol processing accuracy is improved, but device complexity and processing bottleneck increase

Engineering Contradiction:
Improveprotocol processing accuracyVSAvoidCPU processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the TCP processing function into two parts: hardware handles the repetitive data placement and sequence number mapping using pre-configured translation structures, while CPU handles higher-level protocol management. This segmentation reduces CPU complexity while maintaining processing accuracy through dedicated hardware logic

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-configuring the translation lookaside buffer with sequence number to buffer address mappings before packet arrival. This allows the hardware to immediately place incoming packet data into the correct application buffers without CPU intervention, reducing processing complexity while maintaining accuracy through pre-computed translation tables

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11979340B2Direct data placement
Publication Date: 2024.05.07 MELLANOX TECHNOLOGIES LTD(IL)
  • US11979340B2 patent drawing
  • US11979340B2 patent drawing
  • US11979340B2 patent drawing

AI summary

A method for communication includes mapping transport sequence numbers in headers of data packets received from a network to respective buffers in a memory of a host computer. At least a part of the data from payloads of the received data packets is written directly to the respective buffers.