Direct Die-to-Die Multichip Packaging for Mixed Die Footprints
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Solution Overview
Problem
Existing multichip packaging technologies face challenges in efficiently integrating semiconductor devices with varying footprints and thicknesses in dense arrangements, often requiring complex substrate modifications and limiting direct bonding and electrical interconnections.
Innovation Solution
The method involves embedding semiconductor devices in multiple packaging layers with direct bonding and using polymeric materials for molding and redistribution layers, allowing for diverse die configurations and direct electrical connections through internal interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple semiconductor devices are assembled in dense arrangements within one package, then the volume required for various components is reduced, but the complexity of integrating devices with varying footprints and thicknesses increases
Solution Approach 1:
The patent transitions from traditional planar (2D) device arrangements to a three-dimensional (3D) stacked configuration where devices are vertically integrated across multiple layers. This dimensional change allows dense packaging of devices with varying footprints and thicknesses by utilizing vertical space, thereby reducing overall package volume while managing integration complexity through standardized interconnection structures.
Solution Approach 2:
The package structure is segmented into multiple distinct layers including first and second packaging layers, molding compounds, and interconnect structures. Each layer is independently formed and optimized for specific functions (e.g., device placement, electrical interconnection, protection), allowing devices with varying characteristics to be integrated without requiring complex modifications to the entire package structure.
2Reliability
If direct bonding between devices is implemented, then electrical interconnections are improved and space is saved, but the requirement for precise alignment and bonding conditions increases complexity
Solution Approach 1:
The patent introduces intermediate structures including molding compounds and redistribution layers that facilitate direct bonding between devices. These intermediaries provide mechanical support, thermal management, and electrical routing functions that simplify the bonding process by pre-configuring connection paths and reducing the need for complex real-time alignment and bonding condition control.
3Adaptability or versatility
If devices with varying footprints and thicknesses are integrated, then design flexibility is improved, but the difficulty of achieving uniform packaging and interconnection increases
Solution Approach 1:
The patent applies local quality by allowing each device and packaging region to have customized characteristics (varying footprints, thicknesses, and material properties) while maintaining overall package uniformity through standardized interconnection interfaces and molding compounds that accommodate local variations without compromising global packaging consistency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient integration of devices with disparate sizes and thicknesses, reducing complexity and enhancing electrical connectivity within a single package.
Implementation Method 1
The first surface of the second electronic component physically contacts and is bonded to the first surface of the first electronic component
Implementation Method 2
A volume of molding material encapsulates the first electronic component and the second electronic component
Implementation Method 3
An internal interconnect passes through the volume of molding material and the aperture in the first electronic component. The internal interconnect electrically couples an electrically conductive interconnect in the first redistribution layer to an electrical contact pad belonging to the second electronic component
Data Source
AI summary
A multi-chip package includes two electronic components bonded to each other via features on corresponding faces of the components that are directly opposite each other. The components are encapsulated in a volume of molding material that can include upper and lower sets of redistribution layers disposed on upper and lower surfaces of the volume of molding material that include electrical interconnects. The package includes one or more internal interconnects that pass through an aperture in the first electronic component to electrically couple an electrical contact on a surface of the package to the second electronic component.