Direct Doorbell Ring in Virtualized PCIe Systems
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Solution Overview
Problem
In virtualized systems, existing technologies face challenges in securely facilitating direct doorbell rings between devices coupled to an interconnect fabric like PCIe, particularly when non-CPU devices need to notify each other of work readiness, as they lack access to system physical addresses and standard translation mechanisms.
Innovation Solution
A technique that allows a first non-CPU device to ring a doorbell of a second non-CPU device by writing to a doorbell address in the guest physical address space, with a check block ensuring the offset is within allowed doorbell addresses for security, enabling direct doorbell ring mode operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If direct doorbell ring mode is implemented allowing non-CPU devices to write to doorbell addresses in guest physical address space, then notification efficiency and latency are improved, but security risks increase due to potential unauthorized access
Solution Approach 1:
The patent introduces a doorbell address translation mechanism that acts as an intermediary between non-CPU devices and doorbell addresses. The translation mechanism includes validation logic that checks whether a doorbell address in guest physical address space corresponds to a valid doorbell address in system physical address space, thereby enabling secure direct doorbell rings without CPU intervention.
Solution Approach 2:
The patent changes the addressing parameter from requiring system physical addresses to accepting guest physical addresses for doorbell operations. This parameter change enables non-CPU devices to directly access doorbells using guest physical addresses while the translation mechanism ensures security by validating the correspondence between guest and system physical addresses.
2Reliability
If standard address translation mechanisms are used for doorbell addresses, then security is maintained through CPU control, but notification efficiency decreases due to CPU involvement
Solution Approach 1:
The patent extracts the address translation and validation function from the CPU and implements it directly in the doorbell address translation mechanism. This extraction allows non-CPU devices to perform doorbell operations independently using guest physical addresses, eliminating CPU involvement and improving notification efficiency while maintaining security through the built-in validation logic.
Solution Approach 2:
The patent enables non-CPU devices to self-service doorbell operations by allowing them to directly write to doorbell addresses in guest physical address space. The doorbell address translation mechanism provides self-validation to ensure security, eliminating the need for CPU-mediated translation and enabling efficient direct notification between devices.
3Reliability
If non-CPU devices are restricted from direct doorbell access, then security is maintained, but device complexity and communication overhead increase
Solution Approach 1:
The patent makes the doorbell address translation mechanism universal by enabling it to handle both guest physical addresses and system physical addresses. The mechanism validates doorbell addresses regardless of whether they originate from CPU or non-CPU devices, providing a unified security framework that simplifies the system architecture and reduces communication overhead.
Data Source
AI summary
A technique for facilitating direct doorbell rings in a virtualized system is provided. A first device is configured to “ring” a “doorbell” of a second device, where both the first and second devices are not a host processor such as a central processing unit and are coupled to an interconnect fabric such as peripheral component interconnect express (“PCIe”). The first device is configured to ring the doorbell of the second device by writing to a doorbell address in a guest physical address space. For security reasons, a check block checks an offset portion of the doorbell address against a set of allowed doorbell addresses for doorbells specified in the guest physical address space, allowing the doorbell to be written if the doorbell is included in the set of allowed doorbell addresses.


