Direct-Drive RF Circuit With Dynamic Impedance Matching

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Solution Overview

Problem

Existing substrate processing systems face inefficiencies due to impedance mismatches between the load and drive circuit, leading to power reflection, especially when varying RF plasma power or RF bias power frequencies and levels, and traditional impedance tuning methods are slow and inadequate.

Innovation Solution

A dual frequency hybrid drive circuit is introduced, comprising a direct drive circuit operating at a first frequency and a second drive circuit operating at a different frequency, using dual DC supplies to eliminate DC bias and incorporating phase offset adjustment to maintain optimal impedance matching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If RF plasma power or RF bias power frequency and level are varied to provide process control, then process control capability is improved, but impedance mismatch occurs leading to power reflection

Engineering Contradiction:
Improveprocess control capabilityVSAvoidpower reflection
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent implements dynamic frequency adjustment by detecting phase offset between voltage and current signals and automatically tuning the RF generator frequency to maintain optimal impedance matching. This dynamic adaptation allows the system to vary power frequency and level for process control while continuously eliminating impedance mismatch, thereby preventing power reflection and resolving the technical contradiction.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If traditional impedance tuning methods are used to match load impedance, then power reflection is reduced, but tuning speed is slow and control responsiveness is inadequate

Engineering Contradiction:
Improvepower reflection reductionVSAvoidtuning speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent employs a feedback control mechanism where phase offset between voltage and current signals is continuously detected and used to adjust the RF generator frequency in real-time. This closed-loop feedback system enables rapid impedance tuning by directly responding to phase offset measurements, achieving both low power reflection and fast tuning speed, thus resolving the contradiction between energy efficiency and response speed.

Inventive Principle:
Principle #23Feedback

3Device complexity

If DC bias is present in the drive circuit, then circuit operation is simplified, but impedance matching accuracy deteriorates and power delivery efficiency decreases

Engineering Contradiction:
Improvecircuit operation simplicityVSAvoidpower delivery efficiency
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent extracts and eliminates DC bias from the RF drive circuit by implementing a DC blocking capacitor in series with the RF output and using coupling capacitors to separate DC and RF signal paths. This removal of DC bias eliminates its detrimental effect on impedance matching accuracy while maintaining adequate circuit operation through the RF signal path, thereby resolving the contradiction between circuit simplicity and power delivery efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP3807921B1Direct drive RF circuit for substrate processing systems
Publication Date: 2025.12.31 LAM RES CORP
  • EP3807921B1 patent drawingFigure 1
  • EP3807921B1 patent drawingFigure 2~3
  • EP3807921B1 patent drawingFigure 4~5

AI summary

A direct drive circuit for providing RF power to a component of a substrate processing system includes a clock generator to generate a clock signal at a first frequency, a gate driver to receive the clock signal and a half bridge circuit. The half bridge circuit includes a first switch with a control terminal connected to the gate driver, a first terminal and a second terminal; a second switch with a control terminal connected to the gate driver, a first terminal connected to the second terminal of the first switch and an output node, and a second terminal; a first DC supply to supply a first voltage potential to the first terminal of the first switch; and a second DC supply to supply a second voltage potential to the second terminal of the second switch. The first voltage potential and the second voltage potential have opposite polarity and are approximately equal in magnitude.