Direct Scatter Load for Multi-Processor Boot-Up

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Solution Overview

Problem

In multi-processor systems, the existing methods for loading executable software images from a primary processor to secondary processors require intermediate buffering steps, leading to increased memory copy operations and circuit board size due to the need for dedicated non-volatile memory for each processor, which complicates boot-up processes and increases costs.

Innovation Solution

A direct scatter load technique is employed, where the primary processor sends raw image data directly to the secondary processor's volatile memory without an intermediate buffer, using an inter-processor communication bus and an image header to determine target locations, thereby bypassing traditional buffering and packet header processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated non-volatile memory is added to each processor, then each processor can store executable images locally, but circuit board size increases

Engineering Contradiction:
Improveboot-up reliabilityVSAvoidcircuit board size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the non-volatile memory function into a shared resource (primary processor's non-volatile memory) that serves multiple processors, eliminating the need for each processor to have dedicated non-volatile memory while maintaining the ability to store and access executable images reliably

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The primary processor's non-volatile memory is made universal by enabling it to store executable images for multiple secondary processors, allowing a single memory resource to serve multiple functions across different processors in the system

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If software images are loaded from another processor, then circuit board size is reduced, but memory copy operations increase

Engineering Contradiction:
Improvecircuit board sizeVSAvoidboot-up speed
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The patent extracts the intermediate buffering step from the traditional image loading process, enabling direct transfer of executable images from the primary processor's non-volatile memory to secondary processors' volatile memory without requiring temporary buffers, thereby reducing memory copy operations and improving boot-up speed

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements a direct scatter load mechanism that skips the intermediate buffering stage entirely, allowing the image data to be loaded directly into the secondary processor's memory locations without passing through a temporary buffer, thus accelerating the boot-up process

Inventive Principle:
Principle #21Skipping (Rushing through)

3Reliability

If traditional buffering method is used for image transfer, then data transfer is stable, but boot-up time increases

Engineering Contradiction:
Improvedata transfer stabilityVSAvoidboot-up time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by having the primary processor prepare and position the executable images in its non-volatile memory before the boot-up sequence starts, so that during boot-up the images can be directly loaded to secondary processors without requiring intermediate buffering or additional data preparation steps, thereby reducing boot-up time while maintaining transfer stability

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9058191B2Direct transfer of executable software image to memory allocated by target processor based on transferred image header
Publication Date: 2015.06.16 QUALCOMM INC
  • US9058191B2 patent drawing
  • US9058191B2 patent drawing
  • US9058191B2 patent drawing

AI summary

In a multiprocessor system, a primary processor may store an executable image for a secondary processor. A communication protocol assists the transfer of an image header and data segment(s) of the executable image from the primary processor to the secondary processor. Messages between the primary processor and secondary processor indicate successful receipt of transferred data, termination of a transfer process, and acknowledgement of same.