Direct Source Contact Structure for 3D NAND Memory
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Solution Overview
Problem
Current methods for forming three-dimensional memory devices face challenges in creating efficient direct source contact structures, particularly in monolithic three-dimensional NAND string memory devices, where achieving reliable electrical contacts and structural integrity are crucial for high-density memory arrays.
Innovation Solution
The method involves forming an alternating stack of insulating and sacrificial material layers over a substrate, creating memory openings, and replacing the sacrificial layers with electrically conductive layers and memory films, which includes forming source contact layers and vertical semiconductor channels to establish direct contact via structures, ensuring mechanical support and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form source contact structures in three-dimensional memory devices, then the manufacturing process is simpler, but the electrical contact reliability and structural integrity are insufficient
Solution Approach 1:
The patent applies preliminary action by forming the source contact layer and source cavity structure before completing the memory stack formation. The source contact layer is deposited and patterned early in the process, and the source cavity is prepared in advance to receive the vertical semiconductor channel, ensuring that the electrical contact pathway is established before subsequent processing steps that might otherwise compromise contact integrity.
Solution Approach 2:
The source contact structure is segmented into distinct functional components: the source contact layer, the source cavity, the vertical semiconductor channel, and the backside contact via structure. This segmentation allows each component to be optimized independently for its specific function while maintaining overall structural integrity and electrical reliability.
2Reliability
If direct source contact structures are formed, then electrical connectivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent uses the source cavity as an intermediary structure that facilitates the formation of the direct source contact. The cavity provides a controlled environment and structural framework that guides the precise alignment and formation of the vertical semiconductor channel, thereby reducing the overall manufacturing precision requirements while still achieving reliable electrical connectivity.
Solution Approach 2:
The patent transitions from planar contact formation to three-dimensional contact formation by creating vertical semiconductor channels that extend through the memory stack. This dimensional change allows electrical contact to be established through the vertical dimension, providing additional degrees of freedom for alignment and reducing precision requirements in the lateral dimensions.
3Quantity of substance
If high-density memory arrays are formed, then storage capacity increases, but structural integrity becomes more difficult to maintain
Solution Approach 1:
The patent applies the nesting principle by placing the vertical semiconductor channel within the source cavity, and the memory stack within the overall device structure. This nested arrangement allows high-density memory arrays to be formed while maintaining structural integrity, as each nested component provides mechanical support and containment for the others, preventing structural failure even at high densities.
Data Source
AI summary
A source-level sacrificial layer and an alternating stack of insulating layers and sacrificial material layers are formed over a substrate. Memory openings are formed through the alternating stack, and a source cavity is formed by removing the source-level sacrificial layer. A memory film is formally formed by a conformal deposition process, and a source contact layer is formed in the source cavity. Vertical semiconductor channels and drain regions are formed in remaining volumes of the memory openings on sidewalls of the source contact layer. A backside contact via structure is formed through the alternating stack and directly on a sidewall of the source contact layer.