Direct Via-to-Trace Substrate Layout for Dense Package Routing
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Solution Overview
Problem
Current packaging technologies face challenges in achieving high interconnect routing density and reducing the overall size of packages while maintaining performance, as they often require intervening pad interconnects that occupy valuable space.
Innovation Solution
The integration of a substrate with direct via interconnect coupling to trace interconnects, eliminating the need for intervening pad interconnects, thereby increasing trace interconnect density and reducing the package footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pad interconnects are used between via interconnects and trace interconnects, then connection reliability is improved, but interconnect routing density is reduced and package size increases
Solution Approach 1:
The patent removes the pad interconnect layer from the traditional via-pad-trace structure, directly coupling via interconnects to trace interconnects. This extraction of the unnecessary pad component eliminates the space occupation and routing constraints that pads impose, thereby reducing package size while maintaining functional connectivity through direct via-to-trace coupling.
Solution Approach 2:
The patent merges the functions of the via interconnect and pad interconnect by directly coupling the via to the trace interconnect without an intermediate pad layer. This consolidation eliminates the need for separate pad structures, increases routing density by allowing adjacent traces to be closer together, and reduces overall package footprint while maintaining electrical connection reliability.
2Reliability
If pad interconnects are used between via interconnects and trace interconnects, then connection reliability is improved, but interconnect routing density is reduced
Solution Approach 1:
The patent removes the pad interconnect layer from the traditional via-pad-trace structure, directly coupling via interconnects to trace interconnects. This extraction of the unnecessary pad component eliminates the space occupation and routing constraints that pads impose, thereby reducing package size while maintaining functional connectivity through direct via-to-trace coupling.
Solution Approach 2:
The patent merges the functions of the via interconnect and pad interconnect by directly coupling the via to the trace interconnect without an intermediate pad layer. This consolidation eliminates the need for separate pad structures, increases routing density by allowing adjacent traces to be closer together, and reduces overall package footprint while maintaining electrical connection reliability.
3Ease of manufacture
If traditional packaging structures with pad interconnects are used, then manufacturing simplicity is maintained, but device complexity increases due to space constraints
Solution Approach 1:
The patent removes the pad interconnect layer from the traditional via-pad-trace structure, directly coupling via interconnects to trace interconnects. This extraction of the unnecessary pad component eliminates the space occupation and routing constraints that pads impose, thereby reducing package size while maintaining functional connectivity through direct via-to-trace coupling.
Solution Approach 2:
The patent merges the functions of the via interconnect and pad interconnect by directly coupling the via to the trace interconnect without an intermediate pad layer. This consolidation eliminates the need for separate pad structures, increases routing density by allowing adjacent traces to be closer together, and reduces overall package footprint while maintaining electrical connection reliability.
Data Source
AI summary
A package that includes a substrate and an integrated device coupled to the substrate. The substrate includes at least one dielectric layer and a plurality of interconnects comprising a first via interconnect and a first trace interconnect, wherein the first via interconnect is directly coupled to the first trace interconnect. The first via interconnect is coupled to the first trace interconnect without an intervening pad interconnect between the first via interconnect and the first trace interconnect.


