Ramp Signal Generation by Direct Voltage Sampling and Integration
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Solution Overview
Problem
Existing ramp generation circuits in electronic devices face significant errors due to multiple conversion steps and are unable to track changes in process, frequency, temperature, and supply voltage, also requiring costly trimming and increased design complexity.
Innovation Solution
A ramp-generation circuit that samples a reference voltage onto a sampling capacitor and discharges it through a resistor to generate a current, integrating it with an integrating capacitor, reducing the number of conversion steps and improving immunity to errors, using a sampling and transfer phase with a duration shorter than the time constant to ensure linear discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple conversion steps (voltage-to-current, current-mirroring, current-to-voltage) are used in ramp generation, then the circuit can generate a periodic ramp signal, but significant errors are introduced due to process, voltage, temperature, and component mismatch
Solution Approach 1:
The patent extracts and eliminates the problematic intermediate conversion stages (current-mirroring and current-to-voltage conversion) from the traditional voltage-to-current-to-voltage conversion chain. By directly integrating the reference voltage through a capacitor without these intermediate steps, the circuit achieves accurate ramp generation while reducing complexity and error sources
Solution Approach 2:
The patent introduces a switching capacitor as an intermediary element that directly couples the reference voltage to the integration node. This capacitor serves as a mediator that transfers voltage information without requiring current conversion, thereby maintaining accuracy while simplifying the circuit architecture
2Adaptability or versatility
If reference voltage is converted to reference current and mirrored through current-mirror stage, then push-pull reference current sources are generated for integration, but multiple conversion steps add significant error and reduce ability to track changes in process, frequency, temperature, and supply voltage
Solution Approach 1:
The patent removes the current-mirroring stage entirely from the circuit architecture. By eliminating this intermediate conversion step, the circuit maintains direct voltage tracking capability while avoiding the accuracy degradation that occurs through multiple voltage-to-current-to-voltage conversions
Solution Approach 2:
The reference voltage is prepared and held in a switching capacitor during the sampling phase before the integration phase begins. This preliminary voltage storage action ensures that the reference voltage is ready for direct integration without requiring real-time current conversion, enabling the circuit to track changes in process, frequency, temperature, and supply voltage with high accuracy
3Measurement precision
If resistor trimming is performed to account for process variations, then ramp generation accuracy is improved, but cost and design complexity increase
Solution Approach 1:
The patent extracts and eliminates the trimming mechanism from the circuit design. By using direct voltage integration through a capacitor without intermediate current conversion stages, the circuit becomes inherently less sensitive to process variations, removing the need for costly trimming operations while maintaining high accuracy
Solution Approach 2:
The patent replaces expensive trimming mechanisms with simple, fixed capacitor and resistor values. The direct integration approach using basic passive components achieves the desired accuracy without requiring costly adjustable elements or post-fabrication trimming processes
4Use of energy by moving object
If traditional ramp generation circuit topology is used with reference current generation and current mirroring, then periodic ramp signal is generated, but circuit size and power consumption increase
Solution Approach 1:
The patent extracts and removes the power-hungry current-mirroring stage and reference current generation circuitry from the traditional topology. By using direct voltage integration through a capacitor, the circuit achieves the same ramp generation function with significantly reduced power consumption and smaller circuit footprint
Solution Approach 2:
The patent merges the reference voltage sampling and integration functions into a single direct coupling path using a switching capacitor. This consolidation eliminates the need for separate current-mirroring and integration stages, reducing both circuit size and power consumption while maintaining the periodic ramp signal generation function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach directly generates a periodic ramp waveform with reduced errors and increased robustness to variations, eliminating the need for reference current generation and current mirroring, thus minimizing circuit size and power consumption.
Implementation Method 1
sampling a reference voltage onto a sampling capacitor
Implementation Method 2
discharging the reference voltage from the sampling capacitor through at least one resistor to generate a current
Implementation Method 3
generating the periodic ramp waveform by integrating the current with at least one integrating capacitor
Data Source
AI summary
A method for generating a periodic ramp waveform may include in a sampling phase of each period of operation of a ramp-generation circuit, sampling a reference voltage onto a sampling capacitor. The method may also include in a transfer phase of each period of operation of the ramp-generation circuit: discharging the reference voltage from the sampling capacitor through at least one resistor to generate a current and generating the periodic ramp waveform by integrating the current with at least one integrating capacitor, wherein a duration of the transfer phase is significantly smaller than a time constant defined by a capacitance of the sampling capacitor and a resistance of the at least one resistor, such that the reference voltage discharges linearly from the sampling capacitor as a function of time during the transfer phase.