Memory Scrubbing Control with Directed and Periodic Maintenance Modes

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Solution Overview

Problem

Current memory technologies lack sufficient control over scrubbing and wear leveling operations, leading to issues such as unacceptable raw bit error rates and uncorrectable errors due to the inability to customize memory management based on real-time context and specific failure mechanisms.

Innovation Solution

Implementing a memory management system with error correction circuitry on the memory die that allows for directed and periodic scrubbing operations, triggered by a maintenance mode command, to correct errors and manage wear leveling independently, reducing the need for data transfer and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory scrubbing operations are performed using traditional methods, then data errors can be corrected, but the system lacks control over scrubbing operations and cannot customize memory management based on real-time context, leading to unacceptable raw bit error rates

Engineering Contradiction:
Improvedata integrityVSAvoidcontrol over scrubbing operations
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic scrubbing operations where the memory controller can selectively activate scrubbing for specific memory banks based on real-time error conditions and operational context. The scrubbing frequency and target selection are dynamically adjusted rather than using fixed periodic scrubbing, allowing the system to adapt to changing memory states and prioritize scrubbing on banks showing error symptoms.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies scrubbing operations locally to specific memory banks or regions rather than uniformly across the entire memory array. The memory controller can identify problematic banks and target scrubbing operations only to those regions, enabling customized memory management that addresses local error conditions without wasting resources on healthy memory sections.

Inventive Principle:
Principle #3Local quality

2Reliability

If memory management operations are performed frequently to maintain data integrity, then uncorrectable errors are reduced, but power consumption and data transfer requirements increase

Engineering Contradiction:
Improvememory reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic scrubbing operations where memory banks are scrubbed at predetermined intervals rather than continuously. The memory controller monitors error conditions and adjusts the periodicity of scrubbing operations, performing them less frequently when error rates are low and more frequently when errors are detected, thereby reducing average power consumption while maintaining reliability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent enables the memory system to perform self-diagnosis and self-correction through automated error detection and scrubbing operations. The memory controller monitors its own operational status and triggers scrubbing operations autonomously based on detected error patterns, reducing the need for external intervention and minimizing unnecessary power-consuming operations.

Inventive Principle:
Principle #25Self-service

3Duration of action of stationary object

If wear leveling operations are performed to extend memory cell life, then memory cell durability is improved, but the complexity of memory management increases

Engineering Contradiction:
Improvememory cell lifeVSAvoidmemory management complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the memory array into multiple independently manageable banks or regions, each with its own wear leveling characteristics. The memory controller can apply different wear leveling strategies to different segments based on their usage patterns and error rates, simplifying the overall management by treating each segment separately rather than managing the entire array as a single unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts wear leveling parameters such as transfer thresholds, target selection criteria, and operation timing based on real-time monitoring of memory cell conditions. By changing these parameters adaptively rather than using fixed values, the system extends memory cell life while keeping management complexity manageable through automated parameter adjustment.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4668275A1Memory device using maintenance mode command for scrub operations
Publication Date: 2025.12.24 MICRON TECHNOLOGY INC
  • EP4668275A1 patent drawingFigure 1
  • EP4668275A1 patent drawingFigure 2
  • EP4668275A1 patent drawingFigure 3

AI summary

Systems, methods, and apparatus for memory management operations in a memory device. In one approach, an external controller (e.g., ASIC controller) selects a directed scrub or a periodic scrub by issuing an encoded maintenance mode command to a local controller on a memory component managed by the external controller. The selection of the type of command can be based on a context of operation (e.g., signals provided by the memory component). In one example, the directed scrub is selected by the external controller based on error signals provided from error correction circuitry on the memory component during a read operation.