Directory Crossbar for SMP Cache Coherence
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Solution Overview
Problem
In symmetric multiprocessing (SMP) systems, the process of maintaining coherence across multiple CPUs is inefficient due to the time-consuming nature of snoop operations and retrieval of current information from remote caches and memory units, especially as the complexity of the system increases with more CPUs and clusters, leading to degraded overall operating speed.
Innovation Solution
A directory crossbar system is introduced, where a first crossbar is coupled to local processors, a second crossbar to remote processors, and at least one crossbar directory tracks access to information, allowing for the rapid determination of the most current location of information through integrated global or distributed directories, reducing the need for multiple hops and streamlining the snoop process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional snoop operations are used to maintain cache coherence across multiple CPUs, then cache coherence is maintained, but system operating speed is degraded due to time-consuming retrieval of current information from remote caches and memory units
Solution Approach 1:
The directory pre-records the location of current information before snoop operations are needed. When a CPU writes information to its cache, the directory is updated to track this location. During snoop operations, the directory can immediately provide the current location without requiring time-consuming searches across the memory hierarchy, thus maintaining coherence while reducing latency.
Solution Approach 2:
The patent introduces a directory as an intermediary component between CPUs and the memory system. This directory acts as a central tracking mechanism that records where current information is located across different caches and memory units. Instead of CPUs directly performing complex snooping operations across multiple hops, they query the directory which provides the current location, thereby simplifying the coherence maintenance process and reducing system-wide communication overhead.
2Reliability
If multiple hops are required to retrieve current information from remote caches and memory units, then cache coherence is maintained, but latency is increased and operating speed is reduced
Solution Approach 1:
The directory is updated in advance to record the current location of information whenever a write operation occurs. This preliminary tracking eliminates the need for multiple hops during retrieval, as the directory can immediately provide the current location. The pre-established knowledge of information location significantly reduces retrieval latency while ensuring accurate access to current data.
3Reliability
If a directory tracks information access across all CPUs to determine current location, then information coherence is maintained, but system complexity increases
Solution Approach 1:
The directory serves multiple functions within the system: it tracks current information location, responds to snoop operations, and provides location information to CPUs. By consolidating these coherence-maintenance functions into a single universal component rather than distributing complexity across multiple specialized components, the system achieves reliable coherence while managing overall complexity through functional consolidation.
Data Source
AI summary
A system and method for maintaining coherency in a symmetric multiprocessing (SMP) system are disclosed. Briefly described, in architecture, one exemplary embodiment comprises a first crossbar coupled to a plurality of local processors; a second crossbar coupled to at least one remote processor; and at least one crossbar directory that tracks access of information by a remote processor in a symmetric multiprocessing (SMP) system, the remote processor in communication with at least one of the local processors via the crossbars, such that a most current location of the information can be determined by the crossbar directory.