Dirty Bit Granularity via Virtual Address Aliasing
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Solution Overview
Problem
In virtualized computer systems, the efficiency of processes like backup and migration is compromised due to the lack of fine-grained dirty bit information, as any modification of a memory page, regardless of size, results in the entire page being backed up or migrated, leading to inefficiencies with large page sizes.
Innovation Solution
Allocating unused bits in the virtual address range for aliasing allows multiple page table entries to map to a common memory page, providing finer granularity of dirty bit information without changing default memory page sizes or existing hardware, enabling sections of a page to be identified as dirty or clean, thus only transmitting changed portions during backup and migration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple page table entries map to the same physical memory page using aliasing, then the granularity of dirty bit information is improved, but the device complexity increases
Solution Approach 1:
The patent divides a physical memory page into multiple sections by introducing aliasing bits in the virtual address. Each aliasing bit combination maps to a different section of the same physical page, allowing independent dirty bit tracking for each section. This segmentation enables fine-grained dirty bit information without requiring smaller physical page sizes.
Solution Approach 2:
The patent adds a new dimension to address mapping by utilizing unused bits in the virtual address range as aliasing bits. This creates multiple virtual address paths to the same physical page, with each path representing a different section. The additional dimension allows the system to track dirty state at a finer granularity without changing the fundamental page structure.
2Reliability
If the entire memory page is transmitted during backup or migration, then data integrity is ensured, but the loss of substance increases due to transmitting unchanged portions
Solution Approach 1:
The patent extracts only the dirty sections from a memory page for transmission during backup or migration operations. By using aliasing bits to identify which sections have been modified, the system can selectively transmit only those portions that contain changes, leaving clean sections untouched. This extraction principle significantly reduces the volume of data that needs to be transmitted while maintaining complete data integrity.
Solution Approach 2:
Instead of transmitting the entire memory page (excessive action), the patent transmits only the necessary portion - the dirty sections identified through aliasing bit tracking. This partial action approach performs exactly what is needed for data integrity (transmitting modified data) without the waste of transmitting unchanged data, optimizing the balance between reliability and efficiency.
3Speed
If larger memory page sizes are used, then the speed of memory access is improved, but the productivity decreases during backup and migration due to larger data transmission
Solution Approach 1:
The patent segments large memory pages into smaller sections using aliasing bits, allowing the system to maintain large page sizes for fast memory access while enabling fine-grained identification of modified sections. This segmentation allows backup and migration operations to work with smaller subsections of large pages, improving productivity without sacrificing the speed benefits of large page sizes.
Solution Approach 2:
The patent applies partial action by transmitting only the dirty sections of large memory pages during backup and migration, rather than the entire page. This maintains the productivity benefits of smaller data transmission while preserving the speed advantages of large page sizes for normal memory access operations.
Data Source
AI summary
One or more unused bits of a virtual address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for aliasing, dirty bit information can be provided at a granularity that is one-half of a memory page. When M bits are allocated for aliasing, dirty bit information can be provided at a granularity that is 1/(2M)-th of a memory page.