DIRW Matrix Verification for Register State Transitions
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Solution Overview
Problem
Conventional methods for determining verification coverage in hardware design, such as path coverage and code coverage, are inefficient and often result in a large number of unnecessary patterns being generated, leading to increased processing time and potential omissions in verification, which can decrease the reliability of verification accuracy.
Innovation Solution
A DIRW matrix is used to record state transitions and path validity, allowing for the extraction of a coverage standard that focuses on specific registers, thereby reducing the number of patterns requiring verification and ensuring all necessary paths are included, thus improving verification efficiency and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If path coverage method is used to extract all patterns for verification, then verification coverage is improved, but processing time increases enormously due to the large number of patterns generated
Solution Approach 1:
The patent segments the verification process by dividing patterns into two categories: those that can be generated by the verification target circuit itself and those that require external input. This segmentation allows the system to focus verification efforts on the most critical patterns while reducing the overall processing burden.
Solution Approach 2:
The patent extracts and identifies patterns that can be automatically generated by the verification target circuit, separating them from patterns requiring external input. This extraction enables the system to prioritize verification of internally-generated patterns, reducing the need to process all possible patterns and thereby decreasing processing time while maintaining verification coverage.
2Productivity
If code coverage method is used to verify paths, then processing time is reduced, but some verification paths may be omitted decreasing verification reliability
Solution Approach 1:
The patent implements a feedback mechanism that uses the DIRW matrix to track and record which patterns have been verified and which have been omitted. This feedback allows the system to identify gaps in verification coverage and adjust the verification process accordingly, ensuring that critical paths are not missed while maintaining efficient processing.
Solution Approach 2:
The patent introduces dynamic adjustment to the verification process by using the DIRW matrix to adaptively determine which patterns require verification. Rather than statically verifying all patterns or only a fixed subset, the system dynamically adjusts verification priorities based on pattern characteristics and verification status, optimizing both efficiency and reliability.
3Measurement precision
If all patterns are extracted as coverage standard, then verification coverage ratio can be calculated, but many patterns are virtually unuseful leading to decreased verification efficiency
Solution Approach 1:
The patent applies local quality by differentiating between useful and unuseful patterns using the DIRW matrix. Instead of treating all patterns uniformly, the system assigns different verification priorities and processing treatments to different pattern types, focusing computational resources on patterns that contribute most to verification coverage while minimizing processing of unuseful patterns.
Data Source
AI summary
A verification target register to be verified is specified from a configuration of a verification target circuit, and patterns requiring verification are extracted as a coverage standard with regard to the specified verification target register. When the patterns are extracted, a DIRW matrix is prepared to indicate possibly occurring state transitions among four states Declare, Initialize, Read, and Write in the register included in the verification target circuit, and used to decide two coverage standards, a matrix coverage standard and an implementation coverage standard.