Automated Disable Circuit Insertion in Evaluation Hardware
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The creation of an evaluation version of a circuit design for integrated circuits (ICs) using a high-level modeling system is a manual and time-consuming process, requiring the incorporation of protective mechanisms to prevent unauthorized use after a trial period, which is complicated and inefficient.
Innovation Solution
Automatically inserting a disable circuit block into the circuit design using a processor and memory, selecting appropriate locations such as clock enable signals, input/output ports, and reset signals, and optionally including an unlock circuit block to override the disable mechanism, thereby creating an evaluation version of the circuit design that can be stored and implemented as evaluation hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual insertion of disable circuit blocks is used, then the protective mechanism can be implemented, but the process is time-consuming and complicated
Solution Approach 1:
The HLMS automatically identifies suitable locations and inserts disable circuit blocks without requiring manual designer intervention. The system serves itself by autonomously completing the protective mechanism implementation, eliminating the time-consuming manual process while ensuring reliable protection is in place.
Solution Approach 2:
The manual mechanical process of cutting and pasting circuit blocks is replaced with an automated electronic system. The HLMS uses algorithmic analysis to identify insertion points and automatically generates the disable circuit block insertions, substituting manual mechanical operations with automated computational processes.
2Reliability
If manual insertion of disable circuit blocks is used, then the protective mechanism can be implemented, but the process is complicated
Solution Approach 1:
The HLMS autonomously performs the complex task of analyzing the circuit design, identifying suitable insertion points, and placing disable circuit blocks. The system handles the complexity internally through automated algorithms, presenting a simple interface to the user while managing the intricate details of protective mechanism implementation.
Solution Approach 2:
The complexity of implementing protective mechanisms is extracted from the manual design process and encapsulated within the HLMS automated system. The complicated steps of analyzing circuit topology, identifying critical signals, and determining optimal insertion locations are removed from the designer's workflow and handled automatically by the software.
3Productivity
If automated insertion is used, then the creation process is simplified and time is reduced, but automatic location selection is required
Solution Approach 1:
The manual process of selecting insertion locations is replaced with automated electronic analysis. The HLMS uses computational algorithms to evaluate circuit signals and automatically determine optimal positions for disable circuit blocks, substituting human judgment with systematic automated decision-making based on circuit characteristics.
Solution Approach 2:
The HLMS autonomously performs location selection without requiring designer input or approval for each insertion point. The system analyzes the circuit design independently, identifies suitable locations based on predefined criteria, and automatically places disable circuit blocks, fully self-managing the entire insertion process.
Data Source
AI summary
Within a system comprising a processor and a memory, a method of creating evaluation hardware within an integrated circuit can include automatically inserting, by the processor, a disable circuit block into a circuit design. The method can also include automatically selecting a location within the circuit design to insert the disable circuit block, and/or inserting an unlock circuit block into the circuit design, wherein responsive to receiving an unlock code, the unlock circuit block overrides the disable circuit block. The method also can include storing, within the memory, the circuit design comprising the disable circuit block.