Disaggregated Memory Checkpointing for Distributed Fault Rollback

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Solution Overview

Problem

Autonomous Things (AuT) devices face challenges in fault tolerance as tasks become more complex and safety-critical, with conventional centralized systems struggling to manage the complexity and stringent timing requirements in distributed computing environments.

Innovation Solution

A distributed computing system with remote memory nodes and a fault-tolerant memory controller implements lockstep and checkpoint rollback recovery, ensuring correct task execution by comparing snapshots from compute nodes and rolling back to previous checkpoints when errors occur, while predicting timing faults through performance data analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If centralized systems are used to manage fault tolerance, then system control is simplified, but device complexity and timing requirements become unmanageable in distributed environments

Engineering Contradiction:
Improvesystem control complexityVSAvoidfault tolerance capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system divides fault tolerance management into distributed components across multiple compute nodes, with each node independently implementing checkpointing and snapshot capabilities. The memory controller coordinates these distributed components through standardized interfaces, enabling fault tolerance without centralized control overhead.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory controller acts as an intermediary between compute nodes and disaggregated memory resources, coordinating snapshot operations and checkpoint management. This mediator approach enables distributed fault tolerance by centralizing coordination functions while maintaining distributed execution independence.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If snapshots are frequently taken for fault tolerance, then reliability improves, but loss of time due to snapshot operations increases

Engineering Contradiction:
Improvefault tolerance capabilityVSAvoidsnapshot operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs checkpointing and snapshot operations at predetermined intervals and at completion of critical task phases, rather than continuously. This preliminary action approach ensures fault tolerance capabilities are ready in advance while minimizing disruption to normal computation workflows.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Snapshots are taken periodically at optimized intervals based on task characteristics and fault tolerance requirements. The memory controller coordinates periodic snapshot operations across compute nodes, balancing the need for frequent checkpoints against computation time loss by adjusting snapshot frequency dynamically.

Inventive Principle:
Principle #19Periodic action

3Reliability

If disaggregated memory boards are used, then fault tolerance capability improves, but device complexity increases

Engineering Contradiction:
Improvefault tolerance capabilityVSAvoidmemory system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The disaggregated memory boards serve multiple functions: storing active task data, maintaining checkpoint snapshots, and providing fault tolerance redundancy. This multi-functionality reduces overall system complexity by consolidating memory resources that would otherwise require separate dedicated components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system creates snapshot copies of task database states at checkpoint moments, storing these copies in disaggregated memory. This copying approach enables fault tolerance by maintaining historical state copies without requiring complex redundant hardware, as the memory boards efficiently store and manage these state copies.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12566673B2Distributed fault-tolerance via disaggregated memory boards
Publication Date: 2026.03.03 HUAWEI TECH CO LTD
  • US12566673B2 patent drawing
  • US12566673B2 patent drawing
  • US12566673B2 patent drawing

AI summary

A method performed by a computing system that includes multiple compute nodes and a memory node separate from the multiple compute nodes. The method comprises executing a task using the multiple compute nodes; recurrently receiving snapshots at the memory node from the multiple compute nodes, each snapshot including an instance of a task database; setting a current checkpoint by storing a task database instance corresponding to the current checkpoint when all received snapshots match; and rolling back the task database to a previous checkpoint when detecting unmatching snapshots received from the multiple compute nodes, including the memory node distributing a correct checkpoint task database instance to at least one compute node of the multiple compute nodes.