Disaggregated Memory Server Using PCIe for Dynamic Allocation

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Solution Overview

Problem

Existing approaches for sharing state among multiple computing devices are slow in terms of time-to-first byte access and bandwidth, lack flexibility in memory allocation, and require substantial delays due to network stack interactions, making it difficult to dynamically dispatch memory resources.

Innovation Solution

A disaggregated memory server architecture that provides on-demand memory access to computing devices via a Peripheral Component Interconnect Express (PCIe) bus, allowing direct memory access without network stack interactions, with a PCIe switch connecting multiple computing devices to a shared memory bank, and dynamic memory allocation through a management module.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If network-based memory access (Ethernet, InfiniBand, fiber channel) is used, then memory can be shared among computing devices, but access speed and bandwidth are slow with substantial delays

Engineering Contradiction:
Improvememory sharing capabilityVSAvoidaccess speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent replaces network-based memory access mechanisms (Ethernet, InfiniBand, fiber channel) with direct PCIe bus access. This substitution eliminates the network stack interactions and associated delays, achieving high-speed memory access while maintaining the ability to share memory resources among multiple computing devices through the PCIe switch fabric.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a PCIe switch as an intermediary component that enables direct memory access between computing devices and the shared memory bank. This intermediary provides a high-speed communication path that bypasses traditional network stacks, allowing fast data transfer while maintaining memory sharing functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If traditional memory allocation is used, then memory resources can be allocated to computing devices, but flexibility and dynamic dispatch capability are limited

Engineering Contradiction:
Improvememory allocation efficiencyVSAvoiddynamic memory dispatch flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic memory allocation through the management module, which can dynamically assign memory resources from the shared memory bank to different computing devices based on real-time computational needs. This dynamic allocation mechanism enables flexible memory dispatch without the constraints of traditional static memory configurations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent segments the shared memory bank into multiple allocatable memory regions that can be dynamically distributed to different computing devices. This segmentation allows the management module to allocate specific memory portions to specific devices based on demand, enhancing both flexibility and allocation efficiency.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If network stack interactions are used for memory access, then memory sharing is enabled, but substantial delays occur due to protocol processing

Engineering Contradiction:
Improvememory access capabilityVSAvoidaccess delay
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent replaces network stack protocol processing with direct PCIe bus transactions. This substitution eliminates the time-consuming network stack interactions while maintaining the ability to access shared memory resources, significantly reducing access delays and improving time-to-first-byte performance.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent bypasses the traditional network stack processing layers by using direct PCIe bus access. This allows memory access requests to be routed directly to the shared memory bank through the PCIe switch, skipping the intermediate protocol processing steps that cause substantial delays in network-based systems.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS20250231696A1Disaggregated memory server having chassis with a plurality of receptacles accessible configured to convey data with PCIE bus and plurality of memory banks
Publication Date: 2025.07.17 TORMEM INC
  • US20250231696A1 patent drawing
  • US20250231696A1 patent drawing
  • US20250231696A1 patent drawing

AI summary

Provided is a disaggregated memory server, which in some examples is a rack-mounted hardware appliance comprising a pool of memory for allocation to memory clients. Examples of memory clients may include one or more rack-mounted computing devices co-located on a rack with the disaggregated memory server. The disaggregated memory server may be optimized for high-speed dynamic memory allocation to the other computing devices in the rack.