Disaggregated Switch NOS Using External Server Compute

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Solution Overview

Problem

Conventional switch devices face challenges in predicting compute and memory requirements, underutilization of link bandwidth, and insufficient compute resources leading to bottlenecks, especially in high packet transmission scenarios, and limited core availability hindering application acceleration features.

Innovation Solution

A server-based-NOS disaggregated switch device system where the Network Operating System (NOS) is provided by a connected server device, utilizing a Central Processing Unit (CPU) with advanced processors and memory, eliminating the need for a host CPU in the switch device and enabling flexible compute and memory resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a host CPU and host memory system are integrated in the switch device to provide NOS, then the switch device can perform control and management functions, but the compute and memory capabilities become difficult to predict and are insufficient for varying deployment requirements

Engineering Contradiction:
Improvecompute and memory capability adaptabilityVSAvoidhost CPU and memory system integration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent separates the NOS provisioning function from the switch device by connecting to an external server device. The switch device maintains its NPU ASIC for data plane operations, while the host CPU and memory system are relocated to an external server, allowing independent scaling of compute resources without modifying the switch device architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The external server device with host CPU and memory system can serve multiple switch devices simultaneously, providing NOS provisioning services to various deployments with different compute and memory requirements. This universal resource pool enables flexible allocation based on deployment-specific needs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If the link bandwidth between NPU ASIC and host CPU is increased to handle high packet transmission, then telemetry and IPSec operations can be supported, but the host CPU becomes a bottleneck due to insufficient compute resources

Engineering Contradiction:
Improvepacket transmission capabilityVSAvoidhost CPU bottleneck
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent enables dynamic allocation of compute resources by utilizing an external server device with scalable CPU and memory capabilities. The system can adaptively allocate compute resources based on real-time packet transmission demands, allowing the host CPU to handle variable workloads including telemetry and IPSec operations without becoming a fixed bottleneck.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If the number of cores in host CPU is increased to support application acceleration features, then inline cryptography and secure enclave operations can be performed, but the device complexity and cost increase

Engineering Contradiction:
Improveapplication acceleration capabilityVSAvoidhost CPU core count
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the host CPU system from the switch device and places it in an external server device. This extraction allows the switch device to achieve application acceleration capabilities through the external server's CPU cores without increasing the switch device's own complexity. The host CPU can provide inline cryptography and secure enclave operations remotely.

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If host memory system capacity is fixed during design and manufacture, then the switch device can be reliably manufactured, but memory failures cause issues and cannot be addressed after deployment

Engineering Contradiction:
Improvemanufacturing reliabilityVSAvoidmemory capacity flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent moves the memory system from the embedded dimension (within the switch device) to an external dimension (in the server device). This dimensional shift allows memory capacity to be scaled and upgraded independently of the switch device hardware, enabling post-deployment memory expansions and replacements without affecting manufacturing reliability of the switch device itself.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12500854B2Server-based-NOS disaggregated switch device system
Publication Date: 2025.12.16 DELL PROD LP
  • US12500854B2 patent drawing
  • US12500854B2 patent drawing
  • US12500854B2 patent drawing

AI summary

A server-based-Network Operating System (NOS) disaggregated switch device system includes a server device having a server chassis, a switch connector that is accessible on the server chassis, and a Central Processing Unit (CPU) system that is housed in the server chassis, that is coupled to the switch connector, and that is configured to provide a Network Operating System (NOS). Server/switch cabling is connected to the switch connector. A switch device includes a switch chassis, a server connector that is accessible on the switch chassis and that is connected to the server/switch cabling, and a Network Processing Unit (NPU) system that is housed in the switch chassis, that is coupled to the server connector, and that includes a memory subsystem that is configured to be provided with a plurality of switch tables via the server/switch cabling and by the NOS provided by the CPU system in the server device.