Discharge Circuit Stabilizes Voltage During Sudden Power-Off

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Solution Overview

Problem

Semiconductor devices, such as NAND flash memory, face operational errors due to incomplete discharge of high voltage during sudden power-off, leading to data distortion and read errors.

Innovation Solution

A discharge circuit comprising a depletion high voltage NMOS transistor and a low voltage NMOS transistor, connected between high-voltage and power supply terminals, ensures stable discharge operations by utilizing a reference voltage to maintain constant operations and trigger discharge signals during power-off.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high-voltage generating circuit is used to generate high voltage for write and read operations, then the NAND flash memory can perform normal operations, but during sudden power-off the high voltage cannot be discharged properly causing data distortion and read errors

Engineering Contradiction:
Improvedata integrityVSAvoiddischarge operation
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The discharge circuit is pre-configured with a discharge switch connected in parallel with the high-voltage generating circuit. When sudden power-off is detected, the discharge switch is activated to provide a discharge path for the high voltage, ensuring proper voltage dissipation before it can cause data distortion or read errors.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A discharge switch acts as an intermediary component between the high-voltage generating circuit and ground. This switch mediates the discharge process by providing a controlled path for high voltage to dissipate safely, preventing direct damage to the circuit while ensuring complete discharge during power-off conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the discharge circuit is always active to ensure discharge capability, then discharge operation is reliable, but power consumption increases during normal operation

Engineering Contradiction:
Improvedischarge operationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The discharge switch transitions from a static always-on state to a dynamic state that is activated only when needed. The circuit monitors power supply status and activates the discharge switch during power-off conditions while keeping it inactive during normal operation, optimizing both reliability and power consumption by adapting to operational requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The discharge function operates periodically based on power supply events rather than continuously. The discharge switch is activated during power-off events and deactivated during normal operation, creating a periodic activation pattern that ensures discharge capability when needed while minimizing power consumption during normal operation.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The discharge circuit effectively stabilizes voltage levels, ensuring normal discharge operations even during sudden power-off, preventing operational errors and maintaining data integrity.

Implementation Method 1

first circuit includes a depletion high voltage NMOS transistor of which a drain connected to the high-voltage terminal, a source connected to a connection node, and a gate receiving a reference voltage

Methodology Applied
Scientific EffectDepletion mode transistor conduction: Conduction (electrical)

Implementation Method 2

second circuit connected between a power supply voltage terminal and the connection node and suitable for discharging the connection node through the power supply voltage terminal when a power-off of a power supply voltage occurs

Methodology Applied
Scientific EffectNMOS transistor discharge conduction: Conduction (electrical)

Data Source

PatentUS9514821B2Discharge circuit
Publication Date: 2016.12.06 SK HYNIX INC
  • US9514821B2 patent drawing
  • US9514821B2 patent drawing
  • US9514821B2 patent drawing

AI summary

A discharge circuit includes a first circuit connected between a high-voltage terminal and a connection node, wherein first circuit includes a depletion high voltage NMOS transistor of which a drain connected to the high-voltage terminal, a source connected to the connection node, and a gate receiving a reference voltage, and a second circuit connected between a power supply voltage terminal and the connection node and suitable for discharging the connection node through the power supply voltage terminal when a power-off of a power supply voltage occurs. The discharge circuit may stably perform a discharge operation in the case of sudden power-off.