Discharge Transistors for IR-DROP Suppression in Semiconductor Memory

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Solution Overview

Problem

Conventional semiconductor memory devices experience a voltage rise due to IR-DROP when a ground voltage is applied to a memory cell during a program operation, leading to increased chip area and reduced device reliability.

Innovation Solution

Incorporating discharge transistors between the ground and bit lines connected to the memory cell, with independent discharge control signals to manage the application of ground and positive voltages, thereby suppressing voltage rise and reducing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a ground voltage is applied to the source of a memory cell during a program operation through the conventional current path, then the program operation can be performed, but a voltage rise due to IR-DROP occurs in the current path

Engineering Contradiction:
Improvedevice reliabilityVSAvoidvoltage rise due to IR-DROP
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

A discharge transistor is introduced as an intermediary component between the ground voltage source and the source bit line. This discharge transistor provides a dedicated low-impedance path to ground, acting as a mediator that prevents voltage rise in the main current path while still enabling the program operation to proceed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the conventional current path is used to apply ground voltage to the memory cell source, then the program operation can proceed, but the chip area increases

Engineering Contradiction:
Improveprogram operation capabilityVSAvoidchip area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The ground voltage application function is segmented from the main current path. Instead of using the entire conventional path (ground voltage application transistor → column transistors → main bit line → selection transistor sub-bit line), the ground voltage application is segmented into a direct path through the discharge transistor, separating the grounding function from the data transmission function

Inventive Principle:
Principle #1Segmentation

3Reliability

If discharge transistors are added to suppress voltage rise, then device reliability improves and chip area is reduced, but the device complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The discharge transistor is designed to serve multiple functions: it acts as a ground voltage application path during program operations, provides a discharge path for bit line voltage, and helps maintain source voltage stability. By making this single component multi-functional, the need for additional separate components is reduced, thereby limiting the increase in device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces voltage rise due to IR-DROP, enabling low-voltage write operations and minimizing chip area, while maintaining source voltage close to ground, thus improving device reliability.

Implementation Method 1

the ground voltage applied to the source of the memory cell rises from the original ground voltage due to IR-DROP in a current path from the ground to the source of the memory cell MC

Methodology Applied
Scientific EffectIR-DROP: Ohm's Law

Data Source

PatentUS7924627B2Semiconductor memory device
Publication Date: 2011.04.12 PANASONIC SEMICON SOLUTIONS CO LTD
  • US7924627B2 patent drawing
  • US7924627B2 patent drawing
  • US7924627B2 patent drawing

AI summary

In a semiconductor memory device, a voltage rise due to IR-DROP is suppressed which occurs when a ground voltage is applied to a memory cell during a program operation. Discharge transistors are provided between the ground and bit lines connected to the source and drain of the memory cell. The discharge transistors receive mutually independent discharge control signals which are generated and outputted from a DS decoder driver at the respective gates thereof. To the bit line which applies the ground voltage to the memory cell, the ground voltage can be set using the discharge transistor.