Discontinuous Storage Elements in Trench Memory Devices
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Solution Overview
Problem
Conventional floating gate non-volatile memories face inefficiencies in programming mechanisms, such as Fowler-Nordheim tunneling being slow, conventional hot carrier injection being inefficient with high programming current, and source-side injection requiring additional lithographic sequences and larger memory cells, while also facing challenges in high density fabrication due to defects in the gate dielectric layer.
Innovation Solution
The development of an electronic device with discontinuous storage elements and a pair of control and select gate electrodes within trenches, allowing for memory cells to be formed with dimensions smaller than lithographic resolution limits, and enabling efficient programming mechanisms like source-side injection and hot carrier injection with reduced leakage and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional hot carrier injection is used for programming floating gate memories, then programming current is high, but programming efficiency is low
Solution Approach 1:
The patent segments the storage element into discrete floating gates positioned above specific channel regions, allowing independent control and injection for each memory cell. This segmentation enables precise localization of hot carrier generation and injection, improving programming efficiency while reducing overall programming current requirements compared to conventional approaches.
Solution Approach 2:
The patent implements local quality by creating high doping concentration regions at specific locations within the channel, adjacent to the floating gates. These localized doped regions serve as efficient hot carrier generation zones, concentrating the programming action where needed rather than requiring high current across the entire channel, thus improving efficiency while reducing total current consumption.
2Productivity
If source-side injection is used to improve programming efficiency, then additional lithographic sequences are required and memory cell size increases
Solution Approach 1:
The patent merges the formation of source/drain regions and floating gate structures into a unified process sequence. The doped regions are formed adjacent to the floating gates in the same fabrication step, eliminating the need for separate lithographic sequences for source-side injection structures. This integration maintains programming efficiency while reducing device complexity and memory cell size.
Solution Approach 2:
The doped regions serve multiple functions: they act as source/drain contacts for carrier injection and simultaneously serve as hot carrier generation regions for programming. This multi-functionality eliminates the need for additional specialized structures required in conventional source-side injection, reducing lithographic complexity while maintaining high programming efficiency.
3Volume of moving object
If gate dielectric layer thickness is decreased to achieve high density, then pinholes and defects increase causing electrical shorts and data retention failures
Solution Approach 1:
The patent employs a composite gate dielectric structure consisting of multiple layers with different materials and properties. This composite structure provides both the thinness required for high density and the defect tolerance needed for reliable data retention. The layered composite design allows defects in one layer to be compensated by other layers, preventing electrical shorts while maintaining the necessary thickness for data retention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the efficiency of memory cell programming, reduces manufacturing complexity, and improves the reliability of high-density memory cell fabrication by minimizing defects and maintaining data retention.
Implementation Method 1
Hot carrier injection can include conventional hot carrier injection and source-side injection. Both involve the generation of hot carriers, some of which are injected into the floating or the other storage element(s).
Implementation Method 2
an electrical field is generated along a channel region of a memory cell. Within the channel region, the electrical field is the highest near the drain region. The electrical field accelerates carriers flowing within the channel region
Implementation Method 3
Fowler-Nordheim tunneling is efficient but is very slow.
Data Source
AI summary
An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.