Discrete Connection Blocks for Dense 3D Semiconductor Packaging
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Solution Overview
Problem
Current semiconductor packaging techniques, such as Package-on-Package (PoP), face limitations in integration density due to physical constraints in two-dimensional designs, necessitating innovative approaches to increase the density of integrated passive devices (IPDs) and through vias.
Innovation Solution
The use of discrete blocks, such as silicon or SiO2, encased within a molding compound, allows for the formation of IPDs and through vias with reduced pitch, thereby increasing integration density. These blocks provide structural support and enable closer placement of electrical components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional two-dimensional packaging is used, then manufacturing simplicity is maintained, but integration density is limited
Solution Approach 1:
The patent transitions from traditional two-dimensional packaging to three-dimensional packaging by stacking multiple packages vertically. The PoP structure places a first package and a second package at different vertical levels, connected through intermediate connection elements, thereby increasing integration density by utilizing the third dimension (height) rather than only horizontal plane expansion.
2Quantity of substance
If minimum feature size is reduced to increase component count, then integration density improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the semiconductor system into separate packages (first package and second package) that can be manufactured independently with standard precision requirements. Each package contains its own components and interconnections, allowing them to be produced separately and then assembled vertically. This segmentation enables higher overall integration density without requiring extremely precise manufacturing at the minimum feature size level across the entire system.
3Adaptability or versatility
If more devices are integrated into one chip, then functional capability increases, but design complexity increases
Solution Approach 1:
The patent segments different functional components into separate packages - for example, placing memory devices in one package and logic devices in another. Each package can be designed, manufactured, and tested independently with optimized designs for its specific function. The vertical stacking and interconnection provide the integrated functionality of a single complex chip while maintaining the design simplicity of separate, specialized modules.
Data Source
AI summary
A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.