Discrete Interconnect Substrate Layout for Low-Warpage Packaging

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving high integration density and miniaturization while maintaining high performance and reliability, especially in large package sizes where warpage and board level reliability issues arise.

Innovation Solution

The solution involves forming a redistribution structure on a carrier substrate, attaching multiple interconnect structures with a gap between them, and depositing a molded underfill material to reduce warpage and enhance board level reliability. This method allows for the use of multiple discrete substrates to form a package substrate, reducing costs and improving electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple interconnect structures are attached on a redistribution structure to increase integration density, then the number of input/output pads increases, but package warpage and board level reliability issues worsen

Engineering Contradiction:
Improveintegration densityVSAvoidboard level reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The package substrate is divided into multiple discrete interconnect structures (first interconnect structure, second interconnect structure, etc.) that are separately formed and then attached to the redistribution structure. This segmentation allows each interconnect structure to be independently managed, reducing overall package warpage while maintaining high integration density through the distributed arrangement of multiple structures.

Inventive Principle:
Principle #1Segmentation

2Productivity

If package size is increased to accommodate more interconnect structures, then integration density improves, but package warpage increases

Engineering Contradiction:
Improveintegration densityVSAvoidpackage warpage
Core Design Contradiction:
ProductivityVSShape

Solution Approach 1:

Instead of using a single large package substrate that would experience significant warpage, the invention segments the substrate into multiple smaller interconnect structures distributed across the redistribution structure. This segmentation reduces the thermal and mechanical stress concentration, thereby minimizing package warpage while achieving the required integration density through the collective arrangement of multiple structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each interconnect structure is locally optimized and separately formed on the redistribution structure, allowing for localized control of material properties, thickness, and composition. This local quality approach enables each segment to better accommodate thermal and mechanical stresses, reducing overall package warpage while maintaining high integration density.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If a single large package substrate is used, then manufacturing is simpler, but warpage and reliability issues increase

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidpackage warpage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The manufacturing process is segmented into multiple stages: forming multiple discrete interconnect structures on a carrier substrate, attaching them to the redistribution structure, and then removing the carrier substrate. While this segmented approach increases process steps compared to a single substrate, it enables better control over warpage and reliability, with each segment being manufactured and attached under controlled conditions.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250183056A1Semiconductor Device Comprising Interconnect Structures
Publication Date: 2025.06.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250183056A1 patent drawing
  • US20250183056A1 patent drawing
  • US20250183056A1 patent drawing

AI summary

A system substrate package, a system package, and methods of forming the same are described herein. The system substrate package includes an integrated substrate with multiple discrete interconnect structures. In embodiments the multiple discrete interconnect structures are placed and encapsulated and have a gap formed between the multiple discrete interconnect structures. The system substrate package reduces package warpage and mitigates board level reliability issues.