Discrete Memory Regions for Cost-Effective System Management

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Solution Overview

Problem

Manufacturers face challenges in reducing the amount of internal memory on devices without degrading user experience, as customers demand performance levels that are difficult to maintain with reduced memory.

Innovation Solution

Implementing discrete memory regions, where a primary memory region is used for operating system and application storage, and a secondary graphics memory region for graphics processing, with a memory controller managing allocations and communicating with the central processing device to make informed memory management decisions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the amount of internal memory on a device is reduced, then manufacturing costs decrease and pricing improves, but user experience and performance are degraded

Engineering Contradiction:
Improvemanufacturing costVSAvoiduser experience
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The memory system is divided into two discrete regions: a primary memory region accessible by the central processing device and a secondary graphics memory region accessible by the graphics processing device. This segmentation allows each region to be optimized for its specific purpose, enabling the system to reduce overall memory capacity while maintaining performance by allocating memory efficiently according to actual usage needs.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If discrete memory regions are implemented, then overall system memory can be reduced, but device complexity increases due to multiple memory regions and controllers

Engineering Contradiction:
Improvesystem memoryVSAvoidmemory system complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The graphics processing device includes its own memory controller that autonomously manages the secondary graphics memory region. This self-service approach allows the graphics processing device to independently allocate and manage its own memory resources without requiring intervention from the central processing device, thereby reducing overall system complexity while enabling efficient memory utilization.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

A memory allocation data transfer mechanism serves as an intermediary between the primary and secondary memory regions. The memory controller in the graphics processing device maintains an allocation table and communicates with the central processing device through inter-process communication channels, enabling coordinated memory management across discrete regions without requiring a complex unified control structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If a single memory region is used for both operating system and graphics processing, then device complexity is reduced, but memory allocation efficiency and performance are degraded

Engineering Contradiction:
Improvememory system complexityVSAvoidmemory allocation efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory system is divided into two discrete regions: a primary memory region accessible by the central processing device and a secondary graphics memory region accessible by the graphics processing device. This segmentation allows each region to be optimized for its specific purpose, enabling the system to reduce overall memory capacity while maintaining performance by allocating memory efficiently according to actual usage needs.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10733090B1Memory management in a system with discrete memory regions
Publication Date: 2020.08.04 AMAZON TECH INC
  • US10733090B1 patent drawing
  • US10733090B1 patent drawing
  • US10733090B1 patent drawing

AI summary

A memory management process monitors a communication channel for messages comprising allocation data corresponding to a first discrete memory region and receives a message comprising the allocation data. The memory management process executes a memory management decision for the first discrete memory region based on the allocation data, wherein the first discrete memory region is not addressable by the processing device.