Discrete Power Control for Computer System Components
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Solution Overview
Problem
Current power control systems in computer devices lack the granularity to manage power consumption at the individual component level, limiting the ability to transition between power states efficiently and wasting energy by controlling entire subsystems or reducing voltage, which restricts software access and control over power states.
Innovation Solution
A system with a control register and power controller that allows discrete power control of components within a computer system, enabling each component to operate at multiple power levels, with software access to configure and override power states, using separate power rails and logical gates to manage power levels and signals for memory subsystems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power control logic is used to manage power states, then power consumption is reduced, but the granularity of control is limited to entire subsystems only
Solution Approach 1:
The patent segments the memory subsystem into individually controllable components, where each memory component can be independently powered down or placed in retention mode. This is achieved through separate control bits in the power management register that correspond to specific memory components, allowing fine-grained power control at the component level rather than subsystem level.
2Use of energy by moving object
If clock gating or voltage reduction is used to reduce power consumption, then energy savings are achieved, but direct software control of individual subsystems is not available
Solution Approach 1:
The patent introduces a power management register as an intermediary between software and the memory subsystem components. Software can write to specific bits in this register to directly control the power state of individual memory components, providing both energy savings and ease of software access. The register acts as a mediator that translates software commands into appropriate power control signals for individual components.
3Use of energy by moving object
If entire subsystems are powered down to save energy, then power consumption is reduced, but transition time and data accessibility are increased
Solution Approach 1:
The patent applies local quality by allowing different memory components to be in different power states simultaneously. Some components can be fully powered down while others remain in retention mode with data preserved, enabling selective power management based on local needs. This reduces overall power consumption while maintaining quick access to frequently used data in retention mode components.
4Use of energy by moving object
If voltage reduction is used to operate subsystems at lower power, then energy consumption is reduced, but control is limited to subsystem level only
Solution Approach 1:
The patent segments the power control capability to the individual memory component level, with each component having its own control bit in the power management register. This segmentation enables independent control of power states for each component, allowing the system to achieve fine-grained power management without requiring complex voltage reduction circuitry at the component level.
Data Source
AI summary
Systems and methods for discrete power control of components within a computer system are described herein. Some illustrative embodiments include a system that includes a subsystem with a plurality of components (configurable to operate at one or more power levels), a control register (coupled to the plurality of components) including a plurality of bits (each uniquely associated with a one of the plurality of components), and a power controller coupled to, and configurable to cause, the plurality of components to operate at the one or more power levels. The power controller asserts a signal transmitted to the subsystem, commanding the subsystem to transition to a first power level. A first of the plurality of components, associated with an asserted bit of the control register, operates at a second power level corresponding to a level of power consumption different from that of the first power level indicated by the power controller.