Discrete-Time IF Receiver for BLE Noise Filtering at Ultra-Low Power
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Solution Overview
Problem
Current ultra-low-power RF transceivers fail to provide adequate noise filtering to maintain the minimum data packet error rate required by Bluetooth Low Energy (BLE) in IoT devices, despite their low power consumption.
Innovation Solution
A fully discrete-time, high intermediate frequency transmission architecture is implemented, featuring a low-noise amplifier, mixers, and progressively reduced intermediate frequency filters, which convert input signals into discrete-time, high intermediate frequency outputs for effective noise filtering and power management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If ultra-low-power RF transceivers are used in sleep state, then power consumption is reduced, but noise filtering capability deteriorates
Solution Approach 1:
The receiver is divided into multiple operational modes (sleep mode and active mode) with distinct functional characteristics. The discrete-time architecture segments the signal processing into separate phases (sampling phase and hold phase), allowing the system to maintain low power consumption in sleep mode while providing adequate noise filtering when active.
Solution Approach 2:
The ultra-low-power receiver operates in periodic bursts, transitioning between sleep state and active state to handle data transmissions. During active periods, the receiver provides full noise filtering capability, while during sleep periods, power consumption is minimized. This periodic operation allows the system to meet both low power requirements and noise filtering needs.
2Use of energy by moving object
If discrete-time architecture is implemented, then power consumption is reduced, but signal processing complexity increases
Solution Approach 1:
The continuous-time signal processing architecture is replaced with a discrete-time architecture. Instead of continuously processing analog signals, the system samples signals at specific time intervals and processes them in discrete phases, reducing power consumption while managing complexity through structured sampling and holding operations.
Solution Approach 2:
The discrete-time architecture dynamically switches between sampling and holding phases. During the sampling phase, the receiver captures signal samples, and during the hold phase, it maintains these samples for processing. This dynamic operation allows the system to reduce power consumption by keeping circuits in a low-power state between active sampling periods.
3Reliability
If high intermediate frequency is used, then noise filtering is improved, but device complexity increases
Solution Approach 1:
The system changes the intermediate frequency parameter to a high frequency value, which improves noise filtering by moving the signal away from low-frequency noise sources. The discrete-time architecture with its specific sampling rates and holding circuits is designed to work efficiently at this high intermediate frequency, achieving better noise rejection without proportionally increasing complexity.
Data Source
AI summary
An ultra-low-power receiver includes a low-noise amplifier configured to receive an input analog signal and generate an amplified signal and a mixer electrically coupled to the low-noise amplifier. The mixer is configured to convert said amplified signal into an intermediate frequency signal. A progressively reduced intermediate frequency filter is configured to process the intermediate frequency signal from the mixer in discrete time.