Disk Array Tags for 3D NAND Flash Data Protection
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Solution Overview
Problem
The challenge in 3D NAND flash memory is maintaining data reliability while minimizing the amount of data required for tags, as storage space is limited, especially in larger memory capacities, and existing methods require significant buffer memory capacity for effective data protection.
Innovation Solution
The solution involves setting multiple disk array tags across word lines and memory planes in an interleaved arrangement, allowing for data protection using fewer tags, thereby maximizing protection efficiency even when buffer memory capacity is limited.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data stored in multiple physical pages are encoded to have the same tag for mutual protection, then data reliability is improved, but buffer memory capacity requirement increases
Solution Approach 1:
The patent divides the buffer memory into multiple independent tag groups, where each group manages a specific subset of physical pages. This segmentation allows the system to track and protect data across multiple pages without requiring a single large buffer to hold all tag information simultaneously, thereby reducing the peak buffer memory capacity requirement while maintaining cross-page error protection capabilities.
Solution Approach 2:
The patent introduces a hierarchical tag structure with multiple dimensions: page-level tags for individual page protection and cross-page tags for inter-page protection. This dimensional expansion allows the system to achieve comprehensive data protection through layered tagging rather than requiring all pages to share a single tag in a flat buffer structure, effectively reducing the buffer memory footprint while maintaining reliability.
2Reliability
If more buffer memory capacity is allocated to store data corresponding to temporarily stored tags, then data protection capability is improved, but available storage space decreases
Solution Approach 1:
The patent implements partial tagging where not all physical pages require full tag information to be held in buffer memory simultaneously. Instead, tags are generated and stored in a distributed manner across the memory structure, with only essential tag information held in the buffer at any given time. This partial action approach provides sufficient data protection capability while minimizing the buffer memory allocation and maximizing available storage space.
Solution Approach 2:
The patent enables the memory structure to self-organize tag information distribution across multiple physical pages and buffer regions. The system automatically manages tag generation, storage, and retrieval without requiring centralized buffer allocation, allowing the memory structure itself to serve the tagging function and reducing the dedicated buffer memory requirement while maintaining comprehensive data protection.
Data Source
AI summary
A data protection method, a memory storage device and a memory control circuit unit are provided. The method includes: setting a plurality of disk array tags corresponding to a plurality of word lines and a plurality of memory planes, and the plurality of disk array tags corresponding to one of the word lines connected to one of the memory planes are at least partially identical to the plurality of disk array tags corresponding to another one of the word lines connected to another one of the memory planes; receiving a write command and data corresponding to the write command from a host system; and sequentially writing the data into the plurality of word lines and the plurality of memory planes corresponding to the plurality of disk array tags.