Disk Controller ECC Pipeline for On-the-Fly Error Correction

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Solution Overview

Problem

Existing data storage devices in disk drives are inefficient in error correction, as they often read or write entire blocks to facilitate error correction, leading to increased time consumption and reduced performance when correcting errors in partially read or written data.

Innovation Solution

The implementation of an error correction circuitry with a sector FIFO buffer that performs real-time error correction and generates ECC blocks with tags, allowing for efficient detection and correction of errors during read and write operations, reducing the need to read or write entire blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire block is written to the disk to facilitate generation of block-level error correction information, then error correction capability is improved, but writing time increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidwriting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the block into multiple sectors and processes them independently through a pipeline. Each sector can have its error correction information generated and written separately, allowing parallel processing and reducing total write time while maintaining block-level error correction capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary generation of block-level error correction information during the write process itself, rather than requiring a separate pass. The FIFO buffer allows the system to prepare correction information in advance as sectors are being written, eliminating the need to read back the entire block afterward.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the entire block is read from the disk to use block-level information for error correction, then error correction capability is improved, but reading time increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidreading time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and uses sector-level error correction information that is already present in each sector, eliminating the need to read the entire block. The system takes out the necessary correction data from individual sectors and applies it locally, reducing read time while maintaining error correction capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary generation of block-level error correction information during the write process, storing it in the FIFO buffer. This allows the information to be ready for use without requiring a separate read pass, effectively performing the correction preparation in advance.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If error correction is performed after reading all sectors, then correction accuracy is improved, but correction speed decreases

Engineering Contradiction:
Improvecorrection accuracyVSAvoidcorrection speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the error correction process into individual sector-level corrections that can be performed independently and in parallel. Each sector's error correction is handled separately using its own correction information, allowing simultaneous processing of multiple sectors while maintaining accurate correction for each.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements continuous error correction processing through a pipeline architecture where sectors are corrected as they are read, without interruption or batching. The FIFO buffer enables uninterrupted flow of data through the correction process, maintaining both accuracy and speed.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7761770B2Disk controller architecture to allow on-the-fly error correction and write disruption detection
Publication Date: 2010.07.20 EMC IP HLDG CO LLC
  • US7761770B2 patent drawing
  • US7761770B2 patent drawing
  • US7761770B2 patent drawing

AI summary

Error correction in a disk drive is performed by error correction circuitry which accepts data read from a data storage medium. The error correction circuitry performs both block error correction in a first data domain and sector error correction in a second data domain. A sector FIFO buffer is used to facilitate the error correction in real time, or “on-the-fly.” The sector FIFO buffer also enables conversion of the corrected data to the first data domain. The error correction circuitry also generates an ECC block comprising a plurality of sectors and writes the ECC block. The circuitry generates a tag prior to writing the ECC block and adds the tag to each of a plurality of sectors. During a read operation, the circuitry detects a write disruption when the tags for all of the plurality of sectors in the ECC block are not identical.