Disk Drive Clock Circuit Adjusting Edge Timing via Servo Feedback
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Solution Overview
Problem
Existing disk drive technologies face challenges in accurately estimating the start and stop locations of servo and data sectors due to uncertainty in servo sector field lengths and gaps, leading to decreased storage capacity and read/write throughput.
Innovation Solution
A disk drive clock circuit comprising a servo clock generator and a disk locked frequency converter that adjusts the frequency and timing of the servo clock signal to ensure a constant number of cycles between servo address marks, phase locking the modified clock signal to the servo information on the disk, allowing for more precise estimation of sector locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the length of DC erase field, preamble field, and gaps are increased to account for uncertainty in servo sector field locations, then the reliability of sector positioning is improved, but the storage capacity and read/write throughput decrease
Solution Approach 1:
The patent employs a feedback mechanism where the clock circuit monitors the actual positions of servo sector fields and dynamically adjusts the clock edge timing to compensate for deviations. This closed-loop feedback system eliminates the need for excessive safety margins in field lengths, thereby improving positioning accuracy without sacrificing storage capacity or throughput
Solution Approach 2:
The invention changes the timing parameter of the clock signal dynamically by adjusting clock edge timing based on detected servo information. This parameter adjustment allows the system to adapt to variations in disk rotation and servo field positions, achieving accurate positioning with optimized field lengths rather than relying on fixed, conservative timing
2Stability of the object's composition
If the length of DC erase field, preamble field, and gaps are increased to account for uncertainty in servo sector field locations, then the stability of timing relationships is improved, but the productivity decreases
Solution Approach 1:
The patent transitions from a static, fixed timing approach to a dynamic timing system that continuously adjusts clock edge timing based on real-time servo information. This dynamic adaptation maintains stable timing relationships despite variations in disk rotation speed or servo field positions, while avoiding the need for excessive field lengths that would reduce throughput
3Reliability
If conservative timing margins are used to account for uncertainty in servo sector field locations, then the reliability of data reading is improved, but the storage capacity decreases
Solution Approach 1:
By implementing feedback-based clock timing adjustment, the system achieves reliable data reading with optimized servo field lengths. The feedback mechanism compensates for positioning uncertainties dynamically, allowing shorter DC erase fields and gaps while maintaining reading accuracy, thereby increasing the effective storage capacity
Data Source
AI summary
A disk drive clock circuit includes a servo clock generator and a disk locked frequency converter. The servo clock generator generates a servo clock signal in response to servo information read from a data storage disk in a disk drive. The disk locked frequency converter responds to the servo clock signal by generating a modified clock signal having a different frequency, and adjusts timing of an edge of the modified clock signal in response to a timing event identified from the servo information read from the disk. The disk locked frequency converter can include a divide-by-n counter that is configured to divide the frequency of the servo clock signal by a number n to generate the modified clock signal. The disk locked frequency converter can reset the divide-by-n counter to a defined value in response to the timing event. The modified clock signal can thereby be phase locked to the servo information on the disk.