Flat Panel Display Anti-Electrostatic Wire Segmentation

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Solution Overview

Problem

Flat panel displays face issues with static electricity damage during the manufacturing process, particularly due to the insulating nature of the glass substrate, which can deteriorate the TFT and electroluminescent elements, especially as substrate sizes increase.

Innovation Solution

Incorporating an anti-electrostatic wire that couples gate lines and an anti-electrostatic circuit coupled to a data line, with the anti-electrostatic wire being cut between gate lines to electrically isolate them, thereby preventing static electricity discharge and enhancing the anti-electrostatic function.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the substrate area is increased to make larger flat panel displays, then the display size is improved, but static electricity generation increases and reliability deteriorates

Engineering Contradiction:
Improvesubstrate areaVSAvoidanti-electrostatic function
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The anti-electrostatic wire is divided into multiple segments by openings, creating isolated conductive regions between adjacent gate lines. This segmentation prevents continuous static electricity discharge paths while maintaining local electrostatic protection in each pixel region, effectively addressing the increased static electricity generation in larger substrates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The anti-electrostatic wire is positioned specifically between adjacent gate lines in pixel regions, providing localized electrostatic protection where it is most needed. The openings create region-specific isolation, allowing different areas of the substrate to have different electrostatic characteristics tailored to their functional requirements.

Inventive Principle:
Principle #3Local quality

2Reliability

If anti-electrostatic wire is continuously connected to discharge static electricity, then electrostatic protection is improved, but static electricity may still be introduced into TFT channels through pad portions

Engineering Contradiction:
Improveelectrostatic protectionVSAvoidstatic electricity introduction to TFT
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

By introducing openings in the anti-electrostatic wire, the continuous conductive path is segmented into isolated regions. This prevents static electricity from traveling along the anti-electrostatic wire and being introduced into TFT channels through pad portions, while still maintaining electrostatic discharge capability within each segmented region.

Inventive Principle:
Principle #1Segmentation

3Reliability

If anti-electrostatic wire is removed separately to isolate gate lines, then electrical isolation is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The openings for isolating the anti-electrostatic wire are formed simultaneously with the gate line patterns during the same manufacturing step. This preliminary integration of the isolation structure into the existing fabrication process eliminates the need for separate removal or isolation steps, maintaining electrical isolation while simplifying manufacturing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The formation of openings in the anti-electrostatic wire is merged with the gate line formation process. Both structures are created in the same manufacturing step using the same patterning technique, combining two functions (isolation and gate line formation) into a single process operation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7817216B2Flat panel display and method for fabricating the same
Publication Date: 2010.10.19 SAMSUNG DISPLAY CO LTD
  • US7817216B2 patent drawing
  • US7817216B2 patent drawing
  • US7817216B2 patent drawing

AI summary

A flat panel display, having an anti-electrostatic configuration, comprising a plurality of gate lines and data lines formed on an insulating substrate having an emission region and a pad portion, an anti-electrostatic wire initially coupling the gate lines, and an anti-electrostatic circuit coupled to a data line. The anti-electrostatic wire between a gate line and an adjacent gate line is subsequently cut by an opening for cutting the anti-electrostatic wire to electrically isolate the respective gate lines.