Display Device Asymmetric Transistor Kickback Voltage Control
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Solution Overview
Problem
Existing display devices face challenges in improving side visibility and controlling data signal levels across pixel units, particularly in liquid crystal displays, where parasitic capacitance and kickback voltages affect the performance and efficiency of image rendering.
Innovation Solution
The display device incorporates a configuration where transistors connected to different data lines have distinct kickback voltages and overlapping areas of gate and source electrodes, allowing for controlled voltage levels across pixel units without spatial division into sub-pixels, using a data driver and scan driver to manage data signals with opposite phases and polarities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If transistors connected to different data lines have the same overlapping area of gate and source electrodes, then the device structure is simple and easy to manufacture, but kickback voltages become unbalanced causing voltage level inconsistencies across pixel units
Solution Approach 1:
The patent applies local quality by making the overlapping area of gate and source electrodes different for transistors connected to different data lines. Specifically, transistors connected to data lines carrying signals with opposite phases have different overlapping areas, creating different kickback voltages that compensate for voltage level inconsistencies. This localized structural variation resolves the voltage imbalance problem without requiring complex global redesign.
2Illumination intensity
If data signals with opposite phases are applied to adjacent data lines, then side visibility is improved, but crosstalk phenomena increase due to electromagnetic interference
Solution Approach 1:
The patent converts the harmful crosstalk effect into a beneficial one by intentionally designing transistors with different overlapping areas to generate different kickback voltages. The electromagnetic interference between adjacent data lines carrying opposite-phase signals creates voltage variations that, when combined with the deliberately asymmetric transistor structures, produce compensating effects. The kickback voltage differences offset the crosstalk-induced voltage errors, transforming the harmful interference into a mechanism that improves voltage level consistency and side visibility.
3Manufacturing precision
If the overlapping area of gate and source electrodes is increased to reduce kickback voltage, then voltage control precision improves, but parasitic capacitance increases affecting signal integrity
Solution Approach 1:
The patent applies parameter changes by selectively adjusting the overlapping area parameter of gate and source electrodes for different transistors. Instead of uniformly increasing or decreasing the overlapping area, the patent optimizes each transistor's overlapping area based on its specific data line connection and signal characteristics. This selective parameter adjustment achieves the desired kickback voltage levels and voltage control precision while minimizing overall parasitic capacitance impact on signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the control of data signal levels across pixel units, reduces parasitic capacitance, and minimizes ripples in the common voltage, thereby improving side visibility and reducing crosstalk phenomena.
Implementation Method 1
a voltage is applied to the electrodes to generate an electric field that controls the orientation of liquid crystal molecules
Implementation Method 2
a voltage is applied to the electrodes to generate an electric field that controls the orientation of liquid crystal molecules in the liquid crystal layer and also the polarization of incident light
Data Source
AI summary
A display device includes a data driver connected to j- and (j+1)-th data lines, a scan driver connected to i- and (i+1)-th scan lines, and a display panel including k- and (k+1)-th pixel units. The k-th pixel unit includes an i-th transistor with a gate electrode connected to the i-th scan line, a first electrode connected to the j-th data line, and a second electrode connected to an i-th pixel electrode. The (k+1)-th pixel unit includes an (i+1)-th transistor having a gate electrode connected to the (i+1)-th scan line, a first electrode connected to the j-th data line, and a second electrode connected to an (i+1)-th pixel electrode. The i- and (i+1)-th transistors are turned on at a same time, and a kickback voltage of the i-th transistor is less than a kickback voltage of the (i+1)-th transistor.