Display Base Plate Electrode Stack for Higher Pixel Aperture

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Solution Overview

Problem

The increasing pixel density in liquid-crystal displays leads to lower pixel aperture ratios, which is a significant challenge in the field of displaying technology.

Innovation Solution

The displaying base plate is designed with a substrate, a first electrode layer, a first planarization layer with a through hole, and a stack of second, third, and fourth electrode layers, which are connected and planarized to enhance the pixel aperture ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixel density is increased to improve display resolution, then display quality is improved, but pixel aperture ratio decreases

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpixel aperture ratio
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The invention transitions from a planar electrode structure to a three-dimensional stacked electrode structure with multiple layers (first electrode layer, second electrode layer, third electrode layer) connected through conductive holes. This vertical dimensionality change allows the electrodes to maintain effective area and electrical connection while reducing the horizontal footprint, thereby preserving pixel aperture ratio even as pixel density increases.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the second electrode layer is positioned within the projection area of the first electrode layer, and the third electrode layer is positioned within the projection area of the second electrode layer. The conductive holes penetrate through multiple planarization layers to connect these nested electrode layers, creating a compact vertical arrangement that maximizes space utilization and maintains aperture ratio.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If through hole depth is increased to connect electrode layers, then electrical connection is improved, but light leakage increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidlight leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces planarization layers as intermediary structures that fill and cover the conductive holes. These planarization layers act as mediators between the deep conductive holes and the surrounding structures, providing light shielding to prevent light leakage while maintaining the electrical connection through the holes. The planarization layers smooth the surface and close the optical path of the deep holes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention converts the potential harm of deep conductive holes (light leakage) into a benefit by using the same holes for dual purposes: electrical connection and as part of the capacitive structure. The holes are strategically positioned and sized to optimize both electrical performance and optical performance, turning what could be a defect into a functional feature.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS12235557B2Displaying base plate and manufacturing method thereof, and displaying device
Publication Date: 2025.02.25 BOE TECHNOLOGY GROUP CO LTD
  • US12235557B2 patent drawing
  • US12235557B2 patent drawing
  • US12235557B2 patent drawing

AI summary

A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.