Display Baseplate Layout for Via Corrosion Resistance and Compact Frames
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Solution Overview
Problem
Existing display panels face issues with corrosion of connecting via holes between signal lines and gate line driving circuits due to insufficient distance from the sealant, leading to reduced reliability and lifespan, especially under high-temperature conditions.
Innovation Solution
The display baseplate design rearranges signal lines and gate line driving circuits such that signal lines are positioned closer to the display region, increasing the distance from the sealant and reducing the likelihood of via hole corrosion, while optimizing the arrangement of signal lines into different groups based on current type and electronic element size to minimize frame width and enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If signal lines are arranged close to the gate line driving circuit, then the frame width is reduced, but the via holes connecting signal lines to the gate line driving circuit become susceptible to corrosion from sealant, reducing reliability
Solution Approach 1:
The patent introduces a second dimension to the layout arrangement by dividing signal lines into multiple groups (first signal line group and second signal line group) positioned at different distances from the gate line driving circuit. This dimensional differentiation allows simultaneous optimization of frame width (through compact first signal line group) and corrosion resistance (through protected second signal line group), resolving the contradiction between compactness and reliability.
Solution Approach 2:
Different signal line groups are assigned different positional qualities relative to the gate line driving circuit. The first signal line group is positioned closer to minimize frame width, while the second signal line group is positioned farther away or protected to ensure corrosion resistance. This local differentiation of positional quality allows the system to simultaneously achieve both compact dimensions and high reliability.
2Reliability
If signal lines are positioned far from the sealant, then corrosion resistance is improved, but the frame width increases
Solution Approach 1:
The signal line arrangement is segmented into multiple groups with different positional characteristics. The first signal line group is positioned closer to the gate line driving circuit to minimize frame width, while the second signal line group is positioned to ensure adequate distance from sealant for corrosion protection. This segmentation allows the system to achieve both compact dimensions and high reliability simultaneously.
Solution Approach 2:
The patent uses dimensional differentiation in the layout by creating multiple signal line groups at different positions. This allows the system to optimize different aspects (frame width vs. corrosion resistance) in different spatial zones, resolving the contradiction between compactness and reliability.
3Area of stationary object
If signal lines are arranged in a compact layout, then frame width is reduced, but via holes become more susceptible to sealant corrosion
Solution Approach 1:
Different regions of the signal line arrangement are assigned different quality characteristics. The first signal line group occupies a compact region to minimize overall frame area, while the second signal line group is positioned in a protected region or at a greater distance from the sealant to ensure corrosion resistance. This local quality differentiation resolves the contradiction between compact area and reliability.
Solution Approach 2:
The signal lines are segmented into multiple groups with different positional assignments. This segmentation allows the system to achieve compact overall layout while protecting specific via hole regions from sealant corrosion, simultaneously optimizing frame area and reliability.
Data Source
AI summary
A display baseplate includes a display region and a peripheral region, and the display baseplate includes: a substrate, and a gate line driving circuit, a plurality of signal lines, and a gate line provided on one side of the substrate, the gate line driving circuit and the plurality of signal lines all being located in the peripheral region, and the gate line being located in the display region. The gate line driving circuit is respectively connected to the plurality of signal lines and the gate line, and includes a plurality of stages of driving units that are cascaded to each other, each driving unit includes a first element group, and the first element group includes at least one first electronic element. The plurality of signal lines are arranged in a first direction, the first direction is an extending direction of the gate line.