Display Device Bezel Reduction via Vertical Signal Routing
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Solution Overview
Problem
The challenge is to minimize the bezel area of display devices while maintaining effective external input detection, as the increasing number of signal lines and pads required for higher processing speeds leads to larger bezel areas, which are undesirable in modern electronic devices.
Innovation Solution
The display device incorporates a base layer with a circuit element layer, a light emitting element layer, and a thin film encapsulation layer, including an organic layer and detection electrodes, with a connection wire and detection wire configuration that minimizes the bezel area by using a contact part spaced apart from the organic layer and overlapping connection wires in the peripheral area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of signal lines and pads is increased to achieve higher processing speed, then the processing capability is improved, but the bezel area increases
Solution Approach 1:
The patent transitions from planar arrangement to three-dimensional stacking by positioning signal lines at different vertical levels (first signal line at first level, second signal line at second level). This vertical dimensionality allows multiple signal lines to occupy the same horizontal footprint without electrical interference, thereby reducing bezel area while maintaining high processing capability
Solution Approach 2:
The patent implements nesting by placing the second signal line within the vertical projection area of the first signal line. The lower signal line is positioned beneath the upper signal line, creating a nested configuration that maximizes space utilization and minimizes the horizontal footprint of the signal line structure
2Area of stationary object
If the bezel area is minimized to enhance compactness, then the device compactness is improved, but the arrangement of signal lines becomes more difficult
Solution Approach 1:
The patent segments the signal line structure into distinct vertical layers (first level and second level), with each layer containing specific signal lines. This segmentation allows independent routing and connection of signal lines at different levels, simplifying the overall arrangement by breaking down the complex two-dimensional problem into manageable three-dimensional modules
Solution Approach 2:
By introducing the vertical dimension for signal line placement, the patent converts a constrained two-dimensional routing problem into a more flexible three-dimensional arrangement. This allows signal lines to be positioned at different heights to avoid conflicts, reducing bezel area while maintaining manageable complexity through systematic vertical layering
3Area of stationary object
If the contact part is positioned close to the organic layer to reduce space, then the bezel area is reduced, but the risk of electrical interference increases
Solution Approach 1:
The patent positions the contact part at a vertical distance from the organic layer, utilizing the third dimension (height) to resolve the conflict between compactness and electrical isolation. This vertical separation maintains electrical insulation while minimizing the horizontal footprint, allowing compact bezel design without increasing interference risk
Solution Approach 2:
The patent introduces an intermediate insulating layer between the contact part and the organic layer to provide electrical isolation. This intermediary structure prevents direct electrical contact and potential interference while allowing the contact part to be positioned in close proximity to the organic layer, achieving compact design without compromising electrical safety
Data Source
AI summary
A display device includes a base layer including an active area and a peripheral area outside the active area, a circuit element layer including a pixel in the active area of the base layer, a light emitting element layer including light emitting elements on the circuit element layer, a thin film encapsulation layer covering the light emitting element layer and including an organic layer, and an input detection layer on the thin film encapsulation layer and including a detection electrode and a detection wire connected to the detection electrode. The circuit element layer includes a connection wire overlapping the detection wire in the peripheral area, and a contact part to connect the detection wire and the connection wire in the peripheral area. The contact part is spaced apart from the organic layer of the thin film encapsulation layer on a plane.