Display Device Blocking Layers for Transistor Light Shielding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in display technology is to achieve high resolution while managing the complex structure of pixels, which requires efficient light blocking and electrical connectivity without compromising the performance of transistors, especially as pixel size decreases and circuit complexity increases.
Innovation Solution
The implementation of a display device with a substrate having a pixel region and peripheral region, featuring a scan line, data line, transistors, light emitting elements, and blocking layers that are electrically connected to the transistors, with the blocking layers positioned to overlap with the transistors and block light, ensuring effective light blocking and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the pixel size is decreased to achieve high resolution, then the resolution is improved, but the circuit structure becomes more complex and light blocking becomes more difficult
Solution Approach 1:
The blocking layer is divided into multiple segments corresponding to different transistor regions (first blocking layer for first transistor, second blocking layer for second transistor). This segmentation allows independent optimization of light blocking for each transistor while maintaining overall circuit functionality, resolving the complexity issue in high-resolution pixels
Solution Approach 2:
The blocking layers are positioned in the vertical dimension between the substrate and the transistor gates, rather than only in the horizontal plane. This three-dimensional arrangement enables effective light blocking without increasing the horizontal footprint, thus maintaining high resolution while managing circuit complexity
2Object-affected harmful factors
If blocking layers are added to prevent light from reaching transistors, then light blocking is improved, but the device structure becomes more complex
Solution Approach 1:
The blocking layers are merged with the transistor structure by positioning them between the substrate and the gate electrodes, and electrically connecting them to the transistor terminals. This integration achieves light blocking functionality without adding separate independent components, thus improving light blocking while minimizing structural complexity
Solution Approach 2:
The blocking layers serve multiple functions: they block light from reaching the transistor channels, and they are electrically connected to transistor terminals to participate in the electrical circuit operation. This multi-functionality reduces the need for separate components, simplifying the overall structure while achieving effective light blocking
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the resolution and performance of the display device by preventing light from reaching the transistors, thereby improving the electrical properties and reducing leakage currents, allowing for efficient current control and high-resolution imaging.
Implementation Method 1
a first blocking layer disposed between the substrate and the first transistor, the first blocking layer being electrically connected to the first transistor; and a second blocking layer disposed between the substrate and the second transistor, the second blocking layer being electrically connected to the second transistor
Data Source
AI summary
A display device includes: a substrate; a plurality of pixels provided in a pixel region of the substrate; a scan line and a data line, connected to each of the plurality of pixels; a first transistor connected to the scan line and the data line and a second transistor connected to the first transistor; a light emitting element connected to the transistor; a first blocking layer disposed between the substrate and the first transistor, the first blocking layer being electrically connected to the first transistor; and a second blocking layer disposed between the substrate and the second transistor, the second blocking layer being electrically connected to the second transistor, wherein the first blocking layer is connected to a gate electrode of the first transistor, and the second blocking layer is connected to any one of source and drain electrodes of the second transistor.