Display Bonding Pad Layout for Precise Resistance Measurement

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Solution Overview

Problem

Existing display devices face challenges in efficiently measuring resistance, particularly in the bonding areas between substrates and chip-on films, which can affect the quality and performance of the display.

Innovation Solution

The display device incorporates a structured layout with substrate pads, chip-on film pads, and circuit board pads connected by specific lines and test pads, allowing for improved resistance measurement through an ammeter and voltmeter connection, reducing the number of pads and increasing their widths to secure sufficient space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of pads is increased to improve resistance measurement capability, then measurement precision is improved, but device complexity and space consumption increase

Engineering Contradiction:
Improveresistance measurement precisionVSAvoidpad structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The bonding area is divided into multiple discrete measurement regions, each with dedicated substrate pads, chip-on film pads, and circuit board pads. This segmentation allows independent measurement of different bonding areas while maintaining a standardized pad structure in each region, thus improving overall measurement precision without proportionally increasing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pad structure is designed as a universal multi-functional unit that can serve both electrical connection purposes and resistance measurement purposes. Each set of pads (substrate pad, chip-on film pad, circuit board pad) can function as signal transmission pathways while simultaneously serving as measurement terminals, eliminating the need for separate dedicated measurement pads.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If pad width is increased to improve measurement capability and reduce number of pads, then measurement precision is improved, but area occupied by pads increases

Engineering Contradiction:
Improveresistance measurement precisionVSAvoidarea occupied by pads
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The pad structure implements local quality optimization by concentrating measurement functionality in specific localized regions rather than distributing it uniformly. The substrate pads, chip-on film pads, and circuit board pads are positioned to create focused measurement zones with sufficient width for accurate measurements, while other areas maintain minimal pad presence to conserve space.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If multiple test pads and measurement circuits are added to improve resistance measurement, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveresistance measurement precisionVSAvoidmeasurement circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The measurement system utilizes the existing bonding structure and electrical connections to perform self-measurement. The same pads and wiring that serve electrical connection functions also serve as measurement terminals, allowing the device to measure its own bonding area resistance without requiring external complex measurement equipment or additional dedicated measurement circuits.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250254997A1Display device, method of measuring resistance of the display device, and electronic device including the display device
Publication Date: 2025.08.07 SAMSUNG DISPLAY CO LTD
  • US20250254997A1 patent drawing
  • US20250254997A1 patent drawing
  • US20250254997A1 patent drawing

AI summary

A display device includes: a substrate including a display area in which a plurality of pixels are located and a non-display area in contact with the display area; an outer wiring in the non-display area on the substrate; a 1-1 substrate pad in the non-display area on the substrate and connected to the outer wiring; a first chip-on film attached to one side of the substrate and including a 1-1 output pad connected to the 1-1 substrate pad and a 1-1 input pad connected to the 1-1 output pad through a 1-1 line; and a circuit board attached to one side of the first chip-on film and including a 1-1 circuit board pad connected to the 1-1 input pad and a 1-1 test pad connected to the 1-1 circuit board pad through a 1-1 test line.