Half-Power Buffer Amplifier Pre-Driving and Offset Compensation
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Solution Overview
Problem
Conventional half-power output buffers in display driver ICs face challenges in reducing power consumption and offset removal, leading to increased temperature and reduced display quality due to high on-resistance and offset accumulation.
Innovation Solution
A half-power buffer amplifier design with differential amplification units, current mirrors, and offset transistors, along with pre-driving control signals to manage voltage slew rates and offset correction, is implemented to improve voltage slew rate and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the size of transistors in the output multiplexer is increased to reduce on-resistance and improve slew rate, then the voltage slew rate is improved, but the chip area increases
Solution Approach 1:
The patent introduces a pre-driving control signal that activates pre-driving transistors before the main output transistors. This preliminary action pre-charges or pre-discharges the output node, enabling the main transistors to switch faster without requiring larger sizes. The pre-driving mechanism prepares the output node in advance, reducing the burden on the main output transistors and allowing smaller transistor sizes while maintaining high slew rate.
2Use of energy by moving object
If conventional half-power output buffers are used to reduce power consumption, then power consumption is reduced, but offset accumulation occurs and display quality deteriorates
Solution Approach 1:
The patent introduces offset compensation transistors as intermediary elements that actively counterbalance the offset voltages generated by the half-power output buffers. These offset compensation transistors are controlled by offset control signals to generate compensating currents that cancel out the offset accumulation. This intermediary mechanism allows the system to maintain low power consumption while actively correcting offset errors to preserve display quality.
3Productivity
If the number of output buffers is increased to drive more pixels, then display performance is improved, but temperature increases and lifespan is reduced
Solution Approach 1:
The patent implements a half-power operation mode where output buffers are alternately activated based on signal polarity. During negative polarity periods, one set of output buffers is deactivated while the other remains active, and vice versa during positive polarity periods. This periodic activation pattern reduces the average power consumption and heat generation compared to continuous full-power operation, while still maintaining the capability to drive all pixels effectively.
Data Source
AI summary
A half-power buffer amplifier includes an amplification unit including first and second nodes, the amplification unit configured to differentially amplify a differential input signal and to output a differentially amplified output signal, a first output unit including a first buffer unit between a first power source having a first voltage and a second power source having a second voltage, a second buffer unit between the first and second power sources, and a first switch unit between the first and second buffer units, and a second output unit including a third buffer unit between the second power source and a third power source having a third voltage, a fourth buffer unit between the second and third power sources, and a second switch unit between the third and fourth buffer units. Each of the first to third buffer units receives the differentially amplified output signal. The first switch unit is turned on or off based on or in response to a pre-driving control signal.