Display Bypass Line Layout Around Panel Holes and Fan-Out Constraints

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Solution Overview

Problem

The minimization of the non-display area in display devices leads to insufficient space for fan-out lines, causing potential issues with parasitic capacitance and touch signal interference.

Innovation Solution

The display device employs bypass lines and power supply lines arranged in a specific configuration to minimize the non-display area, including sub-bypass lines and power supply lines with varying widths and spacing to prevent overlap and reduce visual recognition of patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the non-display area is minimized, then the display area ratio is improved, but the space for fan-out lines becomes insufficient

Engineering Contradiction:
Improvenon-display areaVSAvoidspace for fan-out lines
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent introduces bypass lines that extend in the first direction (vertical dimension) to connect data lines on opposite sides of the hole, rather than routing all connections horizontally through the non-display area. This dimensional change allows fan-out lines to utilize the display area vertically, resolving the space insufficiency caused by minimized non-display area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bypass lines are segmented into multiple sections: a first sub-bypass line connected to a first data line, a second sub-bypass line connected to a second data line, and a third sub-bypass line connecting these sub-lines. This segmentation allows flexible routing around the hole while maintaining connections, solving the space constraint problem.

Inventive Principle:
Principle #1Segmentation

2Reliability

If fan-out lines are routed through the non-display area, then connectivity is maintained, but parasitic capacitance increases

Engineering Contradiction:
ImproveconnectivityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the fan-out routing from the non-display area by introducing bypass lines that route connections through the display area using the vertical dimension. This extraction removes the harmful effect of extended horizontal routing that generates parasitic capacitance, while maintaining connectivity through the alternative vertical path.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If uniform line spacing is used, then manufacturing is simplified, but visual patterns become recognizable

Engineering Contradiction:
Improveline spacingVSAvoidvisual patterns
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent applies different spacing characteristics to different regions: the first spacing portion between the first sub-bypass line and second sub-bypass line has different characteristics than the second spacing portion between the second sub-bypass line and third sub-bypass line. This local variation in spacing quality prevents recognizable visual patterns while maintaining manufacturing feasibility through controlled regional differences.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12490604B2Display device
Publication Date: 2025.12.02 SAMSUNG DISPLAY CO LTD
  • US12490604B2 patent drawing
  • US12490604B2 patent drawing
  • US12490604B2 patent drawing

AI summary

Provided is a display device. The display device includes a display area including a hole and sub-pixels displaying an image, first data lines disposed on one side of the hole in the display area and extending in a second direction crossing a first direction, second data lines disposed on the other side of the hole in the display area and extending in the second direction, and bypass lines bypassing the hole in the display area and connecting the first data lines and the second data lines, respectively. Each the bypass lines includes a first sub-bypass line extending in the first direction and connected to any one of the first data lines, a second sub-bypass line extending in the second direction and connected to the first sub-bypass line, and a third sub-bypass line extending in the first direction and connecting the second sub-bypass line and any one of the second data.