Display Pixel Capacitor Stacking for Higher Capacitance Density

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Solution Overview

Problem

Existing display devices face challenges in securing sufficient area for transistors and capacitors, leading to inadequate capacitance in storage and compensation capacitors, which affects the performance and efficiency of the display.

Innovation Solution

The display device design includes a first lower active pattern and first lower gate electrode forming a storage capacitor, a second lower gate electrode forming a compensation capacitor, and an upper active pattern and upper gate electrode, where the areas of these components are enlarged to increase capacitance, with specific connection electrodes enhancing electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the areas of transistors and capacitors are enlarged to increase capacitance, then the capacitance of storage and compensation capacitors is improved, but the device area is increased

Engineering Contradiction:

ImprovecapacitanceVSAvoiddevice area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies multi-layer stacking to form capacitors in the vertical dimension rather than expanding only in the planar dimension. The storage capacitor is formed between the first lower active pattern and the first lower gate electrode on different layers, while the compensation capacitor is formed between the first lower gate electrode and the second lower gate electrode on different layers. This three-dimensional arrangement increases capacitance without proportionally increasing the device area.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent nests multiple capacitor structures within the same transistor layout. The storage capacitor and compensation capacitor are integrated into the pixel circuit such that they share common electrodes and occupy overlapping spatial regions when viewed in three dimensions. The first lower gate electrode serves as a common electrode for both capacitors, and the capacitors are positioned to utilize the same planar footprint efficiently.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Reliability

If the areas of transistors and capacitors are enlarged to increase capacitance, then the performance of display device is improved, but the manufacturing complexity is increased

Engineering Contradiction:

ImprovecapacitanceVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of storage and compensation capacitors with the existing transistor fabrication process. The same lithography and etching steps used to create the transistor structures also define the capacitor electrodes and plates. The first lower active pattern, first lower gate electrode, and second lower gate electrode are formed as part of the transistor structure, eliminating the need for separate capacitor fabrication steps.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent designs structures that serve multiple functions simultaneously. The first lower gate electrode acts as both the gate electrode for the transistor and as an electrode for both the storage capacitor and compensation capacitor. The second lower gate electrode serves as the gate electrode for the transistor and as an electrode for the compensation capacitor. This multi-functionality reduces the total number of separate structures that need to be fabricated.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enlarged areas of the active patterns and gate electrodes enhance the capacitance of storage and compensation capacitors, improving the performance and efficiency of the display device.

Implementation Method 1

a first lower gate electrode disposed on the first lower active pattern and forming a storage capacitor together with the first lower active pattern

Methodology Applied

Scientific EffectCapacitance: Capacitance

Implementation Method 2

a second lower gate electrode disposed on the first lower gate electrode and forming a first compensation capacitor together with the first lower gate electrode

Methodology Applied

Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20260051283A1Display device and electronic device including the same

Publication Date: 2026.02.19 SAMSUNG DISPLAY CO LTD

AI summary

A display device includes a first lower active pattern, a first lower gate electrode disposed on the first lower active pattern and forming a storage capacitor together with the lower active pattern, a second lower gate electrode disposed on the first lower gate electrode and forming a first compensation capacitor together with the first lower gate electrode, an upper active pattern disposed on the second lower gate electrode and electrically connected to the first lower gate electrode, and an upper gate electrode disposed on the upper active pattern and electrically connected to the first lower active pattern.