Display Component Carrier Structure for Simpler LED Chip Contacting
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Solution Overview
Problem
The increasing miniaturization of LED chips for display devices poses challenges for printed circuit boards, requiring more complex and costly constructions with long process chains, including laminating, drilling, and phototechnology.
Innovation Solution
A compact component for display devices featuring a carrier with an electrically conductive carrier layer and multiple semiconductor chips, where the chips are mechanically supported and electrically connected to the carrier layer, allowing for a simple mounting and contacting process without the need for complex printed circuit board designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If LED chips are made smaller for cost reasons, then manufacturing cost is reduced, but the requirements for printed circuit boards increase leading to more complex and costly constructions
Solution Approach 1:
The patent merges the LED chip mounting function and electrical contacting function into a single integrated component structure. The carrier serves both as a mechanical support for multiple LED chips and as an electrical connection element with conductive traces, eliminating the need for separate printed circuit board layers and reducing overall system complexity.
Solution Approach 2:
The carrier is designed as a multi-functional element that simultaneously provides mechanical support, electrical connection, and structural integration for multiple LED chips. The conductive traces on the carrier serve both as electrical pathways and as mounting features, allowing a single component to fulfill multiple functions that would otherwise require separate elements.
2Adaptability or versatility
If a two-layer or multilayer construction of printed circuit board is used, then electrical contacting capability is improved, but manufacturing cost increases and process chain lengthens
Solution Approach 1:
The patent segments the electrical contacting function into multiple independent conductive traces on the carrier, allowing each trace to serve a specific LED chip or group of chips. This segmentation enables adequate electrical connectivity without requiring complex multilayer PCB constructions, as each trace can be independently routed and connected.
Solution Approach 2:
The patent transitions from a planar PCB layer approach to a three-dimensional integrated structure where the carrier rises above the substrate plane. This vertical dimension allows conductive traces to be embedded within or on the carrier structure, providing electrical connectivity without requiring multiple PCB layers and associated complex manufacturing processes.
3Adaptability or versatility
If multiple semiconductor chips are arranged on a carrier to form pixels, then display functionality is improved, but mounting and contacting complexity increases
Solution Approach 1:
The patent combines the mounting structure and electrical contacting structure into a single integrated carrier. Multiple LED chips are mounted directly on the carrier which simultaneously provides mechanical support and electrical connection through its conductive traces, eliminating the need for separate mounting and wiring operations.
Solution Approach 2:
The carrier is designed to automatically provide both mechanical support and electrical connection to the LED chips through its integrated structure. The conductive traces are positioned and configured to make automatic electrical contact with the chips upon mounting, eliminating the need for separate wiring operations and reducing manual intervention requirements.
Data Source
AI summary
The invention relates to a component with a support and a plurality of semiconductor chips, in which the support has a single-ply, electrically conducting support layer, wherein the support layer is structured and has a plurality of sublayers. The support layer has a mounting surface, on which the semiconductor chips are arranged, wherein the semiconductor chips are mechanically supported by the support layer and electrically conductively connected to the sublayers. The support has a common electrode for semiconductor chips of a group of a plurality of semiconductor chips, wherein the common electrode is formed by one of the sublayers or by a plurality of electrically connected sublayers of the support layer. The invention further relates to a method for producing a component of this kind.