Display Circuit Command Data CRC Error Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing display circuit technologies cannot detect errors in command data, leading to potential malfunctions in downstream circuits, despite being able to detect errors in image data using cyclic redundancy check (CRC).

Innovation Solution

Incorporating a CRC generation and comparison circuit within the display circuit device to generate and compare CRC values for both command and image data, enabling error detection and prevention of malfunctions by transmitting CRC values between processing and drive circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CRC error detection is implemented only for image data, then image data errors can be detected, but command data errors cannot be detected leading to potential malfunctions

Engineering Contradiction:
Improveerror detection capabilityVSAvoiddata type coverage
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent applies universality by extending the CRC error detection mechanism to handle multiple data types (both image data and command data) through a unified architecture. The drive circuit generates CRC values for command data, transmits them to the display control circuit, which compares them with expected values. This multi-functional approach allows the same error detection infrastructure to protect against errors in different data types, resolving the contradiction between reliability and adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If CRC verification is added for command data, then command data errors can be detected, but the circuit complexity increases

Engineering Contradiction:
Improvecommand data error detectionVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the command data CRC verification function with the existing image data error detection infrastructure. The drive circuit's CRC generation unit, transmission unit, and the display control circuit's expected value generation unit, reception unit, and comparison unit are integrated into the existing error detection framework. This combining approach enables command data error detection without creating a completely separate system, thus reducing the increase in circuit complexity while maintaining improved reliability.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If CRC values are transmitted for command data, then error detection accuracy improves, but the communication overhead increases

Engineering Contradiction:
Improveerror detection accuracyVSAvoiddata transmission volume
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent applies partial action by implementing CRC verification selectively for command data in addition to image data, rather than applying it uniformly to all data types with equal intensity. The system generates and transmits CRC values only when command data is sent, and the comparison is performed only for received command data. This partial application of the error detection mechanism provides sufficient error detection accuracy for command data without excessively increasing communication overhead across all data transmission channels.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11823638B2Display circuit device, display device, and electronic apparatus
Publication Date: 2023.11.21 SEIKO EPSON CORP
  • US11823638B2 patent drawing
  • US11823638B2 patent drawing
  • US11823638B2 patent drawing

AI summary

A display circuit device includes a CPU, a display control circuit, and a drive signal generation circuit. The drive signal generation circuit includes a generation circuit that generates a first CRC value that is a CRC value of command data received from the CPU, and a transmission circuit that transmits the first CRC value to the CPU. The CPU includes an expected value generation circuit that generates a second CRC that is a CRC value of command data before being input to the drive signal generation circuit, a reception circuit that receives the first CRC value, a comparison circuit that compares the first CRC value with the second CRC value, and a control circuit that executes control based on a comparison result obtained by the comparison circuit.