Display Peripheral Circuit Layout for Slim Bezel Panels
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Solution Overview
Problem
Existing display apparatuses face challenges in achieving a slim bezel design due to the spatial constraints imposed by the arrangement of components such as pixel circuits, scan drivers, and capacitors, which occupy significant space in the peripheral areas.
Innovation Solution
The display apparatus incorporates a novel wiring and capacitor arrangement where the first capacitor is positioned in the wiring arrangement area, with its electrodes configured to overlap and extend in specific directions, allowing for a more compact layout that reduces the bezel width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If traditional component arrangement is used in peripheral area, then circuit functionality is ensured, but bezel width increases
Solution Approach 1:
The patent applies dimensionality change by transitioning capacitor electrodes from a planar side-by-side arrangement to a vertical stacking configuration. The first and second electrodes are positioned at different heights (first and second directions) rather than adjacent in the same plane, effectively utilizing the third dimension (vertical space) to reduce horizontal footprint and achieve thinner bezel width while maintaining electrical functionality.
Solution Approach 2:
The patent implements nesting by placing the second capacitor electrode within the vertical projection area of the first electrode. The electrodes are arranged such that one is nested above the other in the vertical direction, allowing compact integration of capacitor components within the peripheral area without increasing lateral dimensions, thereby reducing bezel width.
2Area of stationary object
If capacitor electrodes are arranged side by side, then electrical connection is simplified, but peripheral area occupancy increases
Solution Approach 1:
The patent resolves the area occupancy issue by moving capacitor electrode arrangement from horizontal side-by-side placement to vertical stacking. The first electrode is positioned at a first height and the second electrode at a second height, utilizing vertical space to reduce horizontal footprint in the peripheral area while maintaining electrical connection through vertical conductive paths.
Solution Approach 2:
The patent segments the capacitor structure into vertically separated electrodes (first and second electrodes at different heights) rather than horizontally adjacent electrodes. This segmentation in the vertical dimension allows each electrode to occupy less horizontal space while maintaining the necessary capacitance function, thereby reducing overall peripheral area occupancy.
3Length of stationary object
If wiring and circuit components are densely packed, then bezel width is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent reduces manufacturing precision requirements by utilizing vertical stacking instead of horizontal dense packing. The first and second electrodes are positioned at different vertical levels (first and second directions), which provides greater tolerance for alignment variations compared to lateral positioning. This vertical arrangement achieves compact bezel width while being more tolerant of manufacturing variations.
Data Source
AI summary
The display apparatus includes a substrate including a display area and a peripheral area surrounding the display area, a pixel circuit disposed in the display area, and a scan driver disposed in the peripheral area, electrically connected to the pixel circuit, and including a sensing transistor, a first wiring electrically connected to a source electrode of the sensing transistor, and a first capacitor electrically connected to the source electrode of the sensing transistor and a gate electrode of the sensing transistor. The peripheral area includes a wiring arrangement area in which wirings are disposed, and a circuit arrangement area in which at least one transistor is disposed, wherein the circuit arrangement area is between the display area and the wiring arrangement area. The first capacitor is disposed in the wiring arrangement area. The sensing transistor is disposed in the circuit arrangement area.